arch/sparc/include/asm/nmi.h
Source file repositories/reference/linux-study-clean/arch/sparc/include/asm/nmi.h
File Facts
- System
- Linux kernel
- Corpus path
arch/sparc/include/asm/nmi.h- Extension
.h- Size
- 318 bytes
- Lines
- 15
- Domain
- Architecture Layer
- Bucket
- arch/sparc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __NMI_H
#define __NMI_H
int __init nmi_init(void);
void perfctr_irq(int irq, struct pt_regs *regs);
void nmi_adjust_hz(unsigned int new_hz);
extern atomic_t nmi_active;
void start_nmi_watchdog(void *unused);
void stop_nmi_watchdog(void *unused);
#endif /* __NMI_H */
Annotation
- Atlas domain: Architecture Layer / arch/sparc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.