arch/sparc/include/asm/perf_event.h
Source file repositories/reference/linux-study-clean/arch/sparc/include/asm/perf_event.h
File Facts
- System
- Linux kernel
- Corpus path
arch/sparc/include/asm/perf_event.h- Extension
.h- Size
- 802 bytes
- Lines
- 31
- Domain
- Architecture Layer
- Bucket
- arch/sparc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/ptrace.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __ASM_SPARC_PERF_EVENT_H
#define __ASM_SPARC_PERF_EVENT_H
#ifdef CONFIG_PERF_EVENTS
#include <asm/ptrace.h>
#define perf_arch_fetch_caller_regs(regs, ip) \
do { \
unsigned long _pstate, _asi, _pil, _i7, _fp; \
__asm__ __volatile__("rdpr %%pstate, %0\n\t" \
"rd %%asi, %1\n\t" \
"rdpr %%pil, %2\n\t" \
"mov %%i7, %3\n\t" \
"mov %%i6, %4\n\t" \
: "=r" (_pstate), \
"=r" (_asi), \
"=r" (_pil), \
"=r" (_i7), \
"=r" (_fp)); \
(regs)->tstate = (_pstate << 8) | \
(_asi << 24) | (_pil << 20); \
(regs)->tpc = (ip); \
(regs)->tnpc = (regs)->tpc + 4; \
(regs)->u_regs[UREG_I6] = _fp; \
(regs)->u_regs[UREG_I7] = _i7; \
} while (0)
#endif
#endif
Annotation
- Immediate include surface: `asm/ptrace.h`.
- Atlas domain: Architecture Layer / arch/sparc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.