arch/sparc/include/asm/swift.h
Source file repositories/reference/linux-study-clean/arch/sparc/include/asm/swift.h
File Facts
- System
- Linux kernel
- Corpus path
arch/sparc/include/asm/swift.h- Extension
.h- Size
- 3147 bytes
- Lines
- 108
- Domain
- Architecture Layer
- Bucket
- arch/sparc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
function Copyrightfunction swift_inv_data_tagfunction swift_flush_dcachefunction swift_flush_icachefunction swift_idflash_clearfunction swift_flush_pagefunction swift_flush_segmentfunction swift_flush_regionfunction swift_flush_context
Annotated Snippet
#ifndef _SPARC_SWIFT_H
#define _SPARC_SWIFT_H
/* Swift is so brain damaged, here is the mmu control register. */
#define SWIFT_ST 0x00800000 /* SW tablewalk enable */
#define SWIFT_WP 0x00400000 /* Watchpoint enable */
/* Branch folding (buggy, disable on production systems!) */
#define SWIFT_BF 0x00200000
#define SWIFT_PMC 0x00180000 /* Page mode control */
#define SWIFT_PE 0x00040000 /* Parity enable */
#define SWIFT_PC 0x00020000 /* Parity control */
#define SWIFT_AP 0x00010000 /* Graphics page mode control (TCX/SX) */
#define SWIFT_AC 0x00008000 /* Alternate Cacheability (see viking.h) */
#define SWIFT_BM 0x00004000 /* Boot mode */
#define SWIFT_RC 0x00003c00 /* DRAM refresh control */
#define SWIFT_IE 0x00000200 /* Instruction cache enable */
#define SWIFT_DE 0x00000100 /* Data cache enable */
#define SWIFT_SA 0x00000080 /* Store Allocate */
#define SWIFT_NF 0x00000002 /* No fault mode */
#define SWIFT_EN 0x00000001 /* MMU enable */
/* Bits [13:5] select one of 512 instruction cache tags */
static inline void swift_inv_insn_tag(unsigned long addr)
{
__asm__ __volatile__("sta %%g0, [%0] %1\n\t"
: /* no outputs */
: "r" (addr), "i" (ASI_M_TXTC_TAG)
: "memory");
}
/* Bits [12:4] select one of 512 data cache tags */
static inline void swift_inv_data_tag(unsigned long addr)
{
__asm__ __volatile__("sta %%g0, [%0] %1\n\t"
: /* no outputs */
: "r" (addr), "i" (ASI_M_DATAC_TAG)
: "memory");
}
static inline void swift_flush_dcache(void)
{
unsigned long addr;
for (addr = 0; addr < 0x2000; addr += 0x10)
swift_inv_data_tag(addr);
}
static inline void swift_flush_icache(void)
{
unsigned long addr;
for (addr = 0; addr < 0x4000; addr += 0x20)
swift_inv_insn_tag(addr);
}
static inline void swift_idflash_clear(void)
{
unsigned long addr;
for (addr = 0; addr < 0x2000; addr += 0x10) {
swift_inv_insn_tag(addr<<1);
swift_inv_data_tag(addr);
}
}
/* Swift is so broken, it isn't even safe to use the following. */
static inline void swift_flush_page(unsigned long page)
{
__asm__ __volatile__("sta %%g0, [%0] %1\n\t"
: /* no outputs */
: "r" (page), "i" (ASI_M_FLUSH_PAGE)
: "memory");
}
static inline void swift_flush_segment(unsigned long addr)
{
__asm__ __volatile__("sta %%g0, [%0] %1\n\t"
: /* no outputs */
: "r" (addr), "i" (ASI_M_FLUSH_SEG)
: "memory");
}
static inline void swift_flush_region(unsigned long addr)
{
__asm__ __volatile__("sta %%g0, [%0] %1\n\t"
: /* no outputs */
: "r" (addr), "i" (ASI_M_FLUSH_REGION)
: "memory");
}
Annotation
- Detected declarations: `function Copyright`, `function swift_inv_data_tag`, `function swift_flush_dcache`, `function swift_flush_icache`, `function swift_idflash_clear`, `function swift_flush_page`, `function swift_flush_segment`, `function swift_flush_region`, `function swift_flush_context`.
- Atlas domain: Architecture Layer / arch/sparc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.