arch/sparc/mm/hypersparc.S
Source file repositories/reference/linux-study-clean/arch/sparc/mm/hypersparc.S
File Facts
- System
- Linux kernel
- Corpus path
arch/sparc/mm/hypersparc.S- Extension
.S- Size
- 9770 bytes
- Lines
- 415
- Domain
- Architecture Layer
- Bucket
- arch/sparc
- Inferred role
- Architecture Layer: arch/sparc
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/ptrace.hasm/psr.hasm/asm-offsets.hasm/asi.hasm/page.hasm/pgtable.hasm/pgtsrmmu.hlinux/init.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include <asm/ptrace.h>
#include <asm/psr.h>
#include <asm/asm-offsets.h>
#include <asm/asi.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/pgtsrmmu.h>
#include <linux/init.h>
.text
.align 4
.globl hypersparc_flush_cache_all, hypersparc_flush_cache_mm
.globl hypersparc_flush_cache_range, hypersparc_flush_cache_page
.globl hypersparc_flush_page_to_ram
.globl hypersparc_flush_page_for_dma, hypersparc_flush_sig_insns
.globl hypersparc_flush_tlb_all, hypersparc_flush_tlb_mm
.globl hypersparc_flush_tlb_range, hypersparc_flush_tlb_page
hypersparc_flush_cache_all:
WINDOW_FLUSH(%g4, %g5)
sethi %hi(vac_cache_size), %g4
ld [%g4 + %lo(vac_cache_size)], %g5
sethi %hi(vac_line_size), %g1
ld [%g1 + %lo(vac_line_size)], %g2
1:
subcc %g5, %g2, %g5 ! hyper_flush_unconditional_combined
bne 1b
sta %g0, [%g5] ASI_M_FLUSH_CTX
retl
sta %g0, [%g0] ASI_M_FLUSH_IWHOLE ! hyper_flush_whole_icache
/* We expand the window flush to get maximum performance. */
hypersparc_flush_cache_mm:
#ifndef CONFIG_SMP
ld [%o0 + AOFF_mm_context], %g1
cmp %g1, -1
be hypersparc_flush_cache_mm_out
#endif
WINDOW_FLUSH(%g4, %g5)
sethi %hi(vac_line_size), %g1
ld [%g1 + %lo(vac_line_size)], %o1
sethi %hi(vac_cache_size), %g2
ld [%g2 + %lo(vac_cache_size)], %o0
add %o1, %o1, %g1
add %o1, %g1, %g2
add %o1, %g2, %g3
add %o1, %g3, %g4
add %o1, %g4, %g5
add %o1, %g5, %o4
add %o1, %o4, %o5
/* BLAMMO! */
1:
subcc %o0, %o5, %o0 ! hyper_flush_cache_user
sta %g0, [%o0 + %g0] ASI_M_FLUSH_USER
sta %g0, [%o0 + %o1] ASI_M_FLUSH_USER
sta %g0, [%o0 + %g1] ASI_M_FLUSH_USER
sta %g0, [%o0 + %g2] ASI_M_FLUSH_USER
sta %g0, [%o0 + %g3] ASI_M_FLUSH_USER
sta %g0, [%o0 + %g4] ASI_M_FLUSH_USER
sta %g0, [%o0 + %g5] ASI_M_FLUSH_USER
bne 1b
sta %g0, [%o0 + %o4] ASI_M_FLUSH_USER
hypersparc_flush_cache_mm_out:
retl
nop
/* The things we do for performance... */
Annotation
- Immediate include surface: `asm/ptrace.h`, `asm/psr.h`, `asm/asm-offsets.h`, `asm/asi.h`, `asm/page.h`, `asm/pgtable.h`, `asm/pgtsrmmu.h`, `linux/init.h`.
- Atlas domain: Architecture Layer / arch/sparc.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.