arch/sparc/mm/swift.S

Source file repositories/reference/linux-study-clean/arch/sparc/mm/swift.S

File Facts

System
Linux kernel
Corpus path
arch/sparc/mm/swift.S
Extension
.S
Size
5349 bytes
Lines
257
Domain
Architecture Layer
Bucket
arch/sparc
Inferred role
Architecture Layer: arch/sparc
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <asm/psr.h>
#include <asm/asi.h>
#include <asm/page.h>
#include <asm/pgtsrmmu.h>
#include <asm/asm-offsets.h>

	.text
	.align	4

#if 1	/* XXX screw this, I can't get the VAC flushes working
	 * XXX reliably... -DaveM
	 */
	.globl	swift_flush_cache_all, swift_flush_cache_mm
	.globl	swift_flush_cache_range, swift_flush_cache_page
	.globl	swift_flush_page_for_dma
	.globl	swift_flush_page_to_ram

swift_flush_cache_all:
swift_flush_cache_mm:
swift_flush_cache_range:
swift_flush_cache_page:
swift_flush_page_for_dma:
swift_flush_page_to_ram:
	sethi	%hi(0x2000), %o0
1:	subcc	%o0, 0x10, %o0
	add	%o0, %o0, %o1
	sta	%g0, [%o0] ASI_M_DATAC_TAG
	bne	1b
	 sta	%g0, [%o1] ASI_M_TXTC_TAG
	retl
	 nop
#else

	.globl	swift_flush_cache_all
swift_flush_cache_all:
	WINDOW_FLUSH(%g4, %g5)

	/* Just clear out all the tags. */
	sethi	%hi(16 * 1024), %o0
1:	subcc	%o0, 16, %o0
	sta	%g0, [%o0] ASI_M_TXTC_TAG
	bne	1b
	 sta	%g0, [%o0] ASI_M_DATAC_TAG
	retl
	 nop

	.globl	swift_flush_cache_mm
swift_flush_cache_mm:
	ld	[%o0 + AOFF_mm_context], %g2
	cmp	%g2, -1
	be	swift_flush_cache_mm_out
	WINDOW_FLUSH(%g4, %g5)
	rd	%psr, %g1
	andn	%g1, PSR_ET, %g3
	wr	%g3, 0x0, %psr
	nop
	nop
	mov	SRMMU_CTX_REG, %g7
	lda	[%g7] ASI_M_MMUREGS, %g5
	sta	%g2, [%g7] ASI_M_MMUREGS

#if 1
	sethi	%hi(0x2000), %o0
1:	subcc	%o0, 0x10, %o0
	sta	%g0, [%o0] ASI_M_FLUSH_CTX
	bne	1b
	 nop
#else
	clr	%o0
	or	%g0, 2048, %g7

Annotation

Implementation Notes