arch/um/include/asm/hardirq.h
Source file repositories/reference/linux-study-clean/arch/um/include/asm/hardirq.h
File Facts
- System
- Linux kernel
- Corpus path
arch/um/include/asm/hardirq.h- Extension
.h- Size
- 683 bytes
- Lines
- 32
- Domain
- Architecture Layer
- Bucket
- arch/um
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/cache.hlinux/threads.hlinux/irq.h
Detected Declarations
function ack_bad_irq
Annotated Snippet
#ifndef __ASM_UM_HARDIRQ_H
#define __ASM_UM_HARDIRQ_H
#include <linux/cache.h>
#include <linux/threads.h>
#define __ARCH_IRQ_EXIT_IRQS_DISABLED 1
typedef struct {
unsigned int __softirq_pending;
#if IS_ENABLED(CONFIG_SMP)
unsigned int irq_resched_count;
unsigned int irq_call_count;
#endif
} ____cacheline_aligned irq_cpustat_t;
DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
#define __ARCH_IRQ_STAT
#define inc_irq_stat(member) this_cpu_inc(irq_stat.member)
#include <linux/irq.h>
static inline void ack_bad_irq(unsigned int irq)
{
pr_crit("unexpected IRQ trap at vector %02x\n", irq);
}
#endif /* __ASM_UM_HARDIRQ_H */
Annotation
- Immediate include surface: `linux/cache.h`, `linux/threads.h`, `linux/irq.h`.
- Detected declarations: `function ack_bad_irq`.
- Atlas domain: Architecture Layer / arch/um.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.