arch/um/include/shared/irq_user.h
Source file repositories/reference/linux-study-clean/arch/um/include/shared/irq_user.h
File Facts
- System
- Linux kernel
- Corpus path
arch/um/include/shared/irq_user.h- Extension
.h- Size
- 654 bytes
- Lines
- 28
- Domain
- Architecture Layer
- Bucket
- arch/um
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
sysdep/ptrace.h
Detected Declarations
struct siginfoenum um_irq_type
Annotated Snippet
#ifndef __IRQ_USER_H__
#define __IRQ_USER_H__
#include <sysdep/ptrace.h>
enum um_irq_type {
IRQ_READ,
IRQ_WRITE,
NUM_IRQ_TYPES,
};
struct siginfo;
extern void sigio_handler(int sig, struct siginfo *unused_si,
struct uml_pt_regs *regs, void *mc);
extern void sigchld_handler(int sig, struct siginfo *unused_si,
struct uml_pt_regs *regs, void *mc);
void sigio_run_timetravel_handlers(void);
extern void free_irq_by_fd(int fd);
extern void deactivate_fd(int fd, int irqnum);
extern int deactivate_all_fds(void);
#endif
Annotation
- Immediate include surface: `sysdep/ptrace.h`.
- Detected declarations: `struct siginfo`, `enum um_irq_type`.
- Atlas domain: Architecture Layer / arch/um.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.