arch/um/kernel/sigio.c

File Facts

System

Linux kernel

Corpus path

arch/um/kernel/sigio.c

Extension

.c

Size

426 bytes

Lines

23

Domain

Architecture Layer

Bucket

arch/um

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.

Dependency Surface

• linux/interrupt.h
• irq_kern.h
• os.h
• sigio.h

Detected Declarations

• function sigio_lock
• function sigio_unlock

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2002 - 2007 Jeff Dike (jdike@{linux.intel,addtoit}.com)
 */

#include <linux/interrupt.h>
#include <irq_kern.h>
#include <os.h>
#include <sigio.h>

/* These are called from os-Linux/sigio.c to protect its pollfds arrays. */
static DEFINE_MUTEX(sigio_mutex);

void sigio_lock(void)
{
	mutex_lock(&sigio_mutex);
}

void sigio_unlock(void)
{
	mutex_unlock(&sigio_mutex);
}

Annotation

• Immediate include surface: `linux/interrupt.h`, `irq_kern.h`, `os.h`, `sigio.h`.
• Detected declarations: `function sigio_lock`, `function sigio_unlock`.
• Atlas domain: Architecture Layer / arch/um.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.