arch/x86/boot/cpuflags.c
Source file repositories/reference/linux-study-clean/arch/x86/boot/cpuflags.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/boot/cpuflags.c- Extension
.c- Size
- 2422 bytes
- Lines
- 111
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hbitops.hasm/processor-flags.hasm/msr-index.hcpuflags.h
Detected Declarations
function has_fpufunction has_eflagfunction cpuid_countfunction get_cpuflags
Annotated Snippet
if (max_intel_level >= 0x00000007) {
cpuid_count(0x00000007, 0, &ignored, &ignored,
&cpu.flags[16], &ignored);
}
cpuid(0x80000000, &max_amd_level, &ignored, &ignored,
&ignored);
if (max_amd_level >= 0x80000001 &&
max_amd_level <= 0x8000ffff) {
cpuid(0x80000001, &ignored, &ignored, &cpu.flags[6],
&cpu.flags[1]);
}
}
}
Annotation
- Immediate include surface: `linux/types.h`, `bitops.h`, `asm/processor-flags.h`, `asm/msr-index.h`, `cpuflags.h`.
- Detected declarations: `function has_fpu`, `function has_eflag`, `function cpuid_count`, `function get_cpuflags`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.