arch/x86/boot/cpuflags.h
Source file repositories/reference/linux-study-clean/arch/x86/boot/cpuflags.h
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/boot/cpuflags.h- Extension
.h- Size
- 615 bytes
- Lines
- 28
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/cpufeatures.hasm/processor-flags.h
Detected Declarations
struct cpu_featuresfunction has_eflag
Annotated Snippet
struct cpu_features {
int level; /* Family, or 64 for x86-64 */
int family; /* Family, always */
int model;
u32 flags[NCAPINTS];
};
extern struct cpu_features cpu;
extern u32 cpu_vendor[3];
#ifdef CONFIG_X86_32
bool has_eflag(unsigned long mask);
#else
static inline bool has_eflag(unsigned long mask) { return true; }
#endif
void get_cpuflags(void);
void cpuid_count(u32 id, u32 count, u32 *a, u32 *b, u32 *c, u32 *d);
bool has_cpuflag(int flag);
#endif
Annotation
- Immediate include surface: `asm/cpufeatures.h`, `asm/processor-flags.h`.
- Detected declarations: `struct cpu_features`, `function has_eflag`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.