arch/x86/crypto/aegis128-aesni-asm.S
Source file repositories/reference/linux-study-clean/arch/x86/crypto/aegis128-aesni-asm.S
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/crypto/aegis128-aesni-asm.S- Extension
.S- Size
- 12760 bytes
- Lines
- 603
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: arch/x86
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/linkage.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include <linux/linkage.h>
#define STATE0 %xmm0
#define STATE1 %xmm1
#define STATE2 %xmm2
#define STATE3 %xmm3
#define STATE4 %xmm4
#define KEY %xmm5
#define MSG %xmm5
#define T0 %xmm6
#define T1 %xmm7
.section .rodata.cst16.aegis128_const, "aM", @progbits, 32
.align 16
.Laegis128_const_0:
.byte 0x00, 0x01, 0x01, 0x02, 0x03, 0x05, 0x08, 0x0d
.byte 0x15, 0x22, 0x37, 0x59, 0x90, 0xe9, 0x79, 0x62
.Laegis128_const_1:
.byte 0xdb, 0x3d, 0x18, 0x55, 0x6d, 0xc2, 0x2f, 0xf1
.byte 0x20, 0x11, 0x31, 0x42, 0x73, 0xb5, 0x28, 0xdd
.section .rodata.cst32.zeropad_mask, "aM", @progbits, 32
.align 32
.Lzeropad_mask:
.octa 0xffffffffffffffffffffffffffffffff
.octa 0
.text
/*
* aegis128_update
* input:
* STATE[0-4] - input state
* output:
* STATE[0-4] - output state (shifted positions)
* changed:
* T0
*/
.macro aegis128_update
movdqa STATE4, T0
aesenc STATE0, STATE4
aesenc STATE1, STATE0
aesenc STATE2, STATE1
aesenc STATE3, STATE2
aesenc T0, STATE3
.endm
/*
* Load 1 <= LEN (%ecx) <= 15 bytes from the pointer SRC into the xmm register
* MSG and zeroize any remaining bytes. Clobbers %rax, %rcx, and %r8.
*/
.macro load_partial
sub $8, %ecx /* LEN - 8 */
jle .Lle8\@
/* Load 9 <= LEN <= 15 bytes: */
movq (SRC), MSG /* Load first 8 bytes */
mov (SRC, %rcx), %rax /* Load last 8 bytes */
neg %ecx
shl $3, %ecx
shr %cl, %rax /* Discard overlapping bytes */
pinsrq $1, %rax, MSG
jmp .Ldone\@
.Lle8\@:
add $4, %ecx /* LEN - 4 */
jl .Llt4\@
/* Load 4 <= LEN <= 8 bytes: */
mov (SRC), %eax /* Load first 4 bytes */
Annotation
- Immediate include surface: `linux/linkage.h`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.