arch/x86/entry/vdso/vdso32/Makefile

File Facts

System

Linux kernel

Corpus path

arch/x86/entry/vdso/vdso32/Makefile

Extension

[no extension]

Size

778 bytes

Lines

30

Domain

Architecture Layer

Bucket

arch/x86

Inferred role

Architecture Layer: build/configuration rule

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: GPL-2.0
#
# 32-bit vDSO images for x86.
#

# The vDSOs built in this directory
vdsos-y			:= 32

# Files to link into the vDSO:
vobjs-y					:= note.o vclock_gettime.o vgetcpu.o
vobjs-y					+= system_call.o sigreturn.o
vobjs-$(CONFIG_FUTEX_ROBUST_UNLOCK)	+= vfutex.o

# Compilation flags
flags-y			:= -DBUILD_VDSO32 -m32 -mregparm=0
flags-$(CONFIG_X86_64)	+= -include $(src)/fake_32bit_build.h
flags-remove-y          := -m64

# Checker flags
CHECKFLAGS := $(subst -m64,-m32,$(CHECKFLAGS))
CHECKFLAGS := $(subst -D__x86_64__,-D__i386__,$(CHECKFLAGS))

# The location of this include matters!
include $(src)/../common/Makefile.include

# Linker options for the vdso
VDSO_LDFLAGS_32		:= -m elf_i386 -soname linux-gate.so.1

$(obj)/vdso32.so.dbg: $(vobjs)

Annotation

• Atlas domain: Architecture Layer / arch/x86.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.