arch/x86/events/core.c
Source file repositories/reference/linux-study-clean/arch/x86/events/core.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/events/core.c- Extension
.c- Size
- 80361 bytes
- Lines
- 3156
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/perf_event.hlinux/capability.hlinux/notifier.hlinux/hardirq.hlinux/kprobes.hlinux/export.hlinux/init.hlinux/kdebug.hlinux/kvm_types.hlinux/sched/mm.hlinux/sched/clock.hlinux/uaccess.hlinux/slab.hlinux/cpu.hlinux/bitops.hlinux/device.hlinux/nospec.hlinux/static_call.hasm/apic.hasm/stacktrace.hasm/msr.hasm/nmi.hasm/smp.hasm/alternative.hasm/mmu_context.hasm/tlbflush.hasm/timer.hasm/desc.hasm/ldt.hasm/unwind.hasm/uprobes.h
Detected Declarations
struct sched_statestruct perf_schedfunction x86_perf_event_updatefunction x86_pmu_extra_regsfunction get_possible_counter_maskfunction reserve_pmc_hardwarefunction for_each_set_bitfunction for_each_set_bitfunction release_pmc_hardwarefunction for_each_set_bitfunction reserve_pmc_hardwarefunction release_pmc_hardwarefunction for_each_set_bitfunction hw_perf_event_destroyfunction hw_perf_lbr_event_destroyfunction x86_pmu_initializedfunction set_ext_hw_attrfunction x86_reserve_hardwarefunction x86_release_hardwarefunction typefunction x86_del_exclusivefunction x86_setup_perfctrfunction precise_br_compatfunction x86_pmu_max_precisefunction x86_pmu_hw_configfunction __x86_pmu_event_initfunction x86_pmu_disable_allfunction for_each_set_bitfunction x86_pmu_disablefunction x86_pmu_enable_allfunction for_each_set_bitfunction is_x86_eventfunction perf_sched_initfunction perf_sched_save_statefunction perf_sched_restore_statefunction __perf_sched_find_counterfunction for_each_set_bit_fromfunction perf_sched_find_counterfunction perf_sched_next_eventfunction perf_assign_eventsfunction x86_schedule_eventsfunction factorsfunction successfunction add_nr_metric_eventfunction del_nr_metric_eventfunction collect_eventfunction collect_eventsfunction for_each_sibling_event
Annotated Snippet
struct sched_state {
int weight;
int event; /* event index */
int counter; /* counter index */
int unassigned; /* number of events to be assigned left */
int nr_gp; /* number of GP counters used */
u64 used;
};
/* Total max is X86_PMC_IDX_MAX, but we are O(n!) limited */
#define SCHED_STATES_MAX 2
struct perf_sched {
int max_weight;
int max_events;
int max_gp;
int saved_states;
struct event_constraint **constraints;
struct sched_state state;
struct sched_state saved[SCHED_STATES_MAX];
};
/*
* Initialize iterator that runs through all events and counters.
*/
static void perf_sched_init(struct perf_sched *sched, struct event_constraint **constraints,
int num, int wmin, int wmax, int gpmax)
{
int idx;
memset(sched, 0, sizeof(*sched));
sched->max_events = num;
sched->max_weight = wmax;
sched->max_gp = gpmax;
sched->constraints = constraints;
for (idx = 0; idx < num; idx++) {
if (constraints[idx]->weight == wmin)
break;
}
sched->state.event = idx; /* start with min weight */
sched->state.weight = wmin;
sched->state.unassigned = num;
}
static void perf_sched_save_state(struct perf_sched *sched)
{
if (WARN_ON_ONCE(sched->saved_states >= SCHED_STATES_MAX))
return;
sched->saved[sched->saved_states] = sched->state;
sched->saved_states++;
}
static bool perf_sched_restore_state(struct perf_sched *sched)
{
if (!sched->saved_states)
return false;
sched->saved_states--;
sched->state = sched->saved[sched->saved_states];
/* this assignment didn't work out */
/* XXX broken vs EVENT_PAIR */
sched->state.used &= ~BIT_ULL(sched->state.counter);
/* try the next one */
sched->state.counter++;
return true;
}
/*
* Select a counter for the current event to schedule. Return true on
* success.
*/
static bool __perf_sched_find_counter(struct perf_sched *sched)
{
struct event_constraint *c;
int idx;
if (!sched->state.unassigned)
return false;
if (sched->state.event >= sched->max_events)
return false;
c = sched->constraints[sched->state.event];
/* Prefer fixed purpose counters */
Annotation
- Immediate include surface: `linux/perf_event.h`, `linux/capability.h`, `linux/notifier.h`, `linux/hardirq.h`, `linux/kprobes.h`, `linux/export.h`, `linux/init.h`, `linux/kdebug.h`.
- Detected declarations: `struct sched_state`, `struct perf_sched`, `function x86_perf_event_update`, `function x86_pmu_extra_regs`, `function get_possible_counter_mask`, `function reserve_pmc_hardware`, `function for_each_set_bit`, `function for_each_set_bit`, `function release_pmc_hardware`, `function for_each_set_bit`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: integration implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.