arch/x86/events/intel/ds.c
Source file repositories/reference/linux-study-clean/arch/x86/events/intel/ds.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/events/intel/ds.c- Extension
.c- Size
- 100234 bytes
- Lines
- 3462
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/types.hlinux/slab.hlinux/sched/clock.hasm/cpu_entry_area.hasm/debugreg.hasm/perf_event.hasm/tlbflush.hasm/insn.hasm/io.hasm/msr.hasm/timer.h../perf_event.h
Detected Declarations
struct pebs_record_32struct pebs_record_corestruct pebs_record_nhmstruct pebs_record_hswstruct pebs_record_sklstruct bts_recordfunction intel_pmu_pebs_data_source_nhmfunction __intel_pmu_pebs_data_source_sklfunction intel_pmu_pebs_data_source_sklfunction __intel_pmu_pebs_data_source_grtfunction intel_pmu_pebs_data_source_grtfunction intel_pmu_pebs_data_source_adlfunction __intel_pmu_pebs_data_source_cmtfunction intel_pmu_pebs_data_source_mtlfunction intel_pmu_pebs_data_source_arl_hfunction intel_pmu_pebs_data_source_cmtfunction intel_pmu_pebs_data_source_lnlfunction parse_omr_data_sourcefunction precise_store_datafunction precise_datala_hswfunction pebs_set_tlb_lockfunction __grt_latency_datafunction grt_latency_datafunction cmt_latency_datafunction arw_latency_datafunction lnc_latency_datafunction lnl_latency_datafunction arl_h_latency_datafunction pnc_latency_datafunction nvl_latency_datafunction load_latency_datafunction store_latency_datafunction init_debug_store_on_cpufunction fini_debug_store_on_cpufunction ds_update_ceafunction ds_clear_ceafunction dsfree_pagesfunction alloc_pebs_bufferfunction release_pebs_bufferfunction alloc_bts_bufferfunction release_bts_bufferfunction alloc_ds_bufferfunction release_ds_bufferfunction release_ds_buffersfunction for_each_possible_cpufunction for_each_possible_cpufunction reserve_ds_buffersfunction for_each_possible_cpu
Annotated Snippet
struct pebs_record_32 {
u32 flags, ip;
u32 ax, bc, cx, dx;
u32 si, di, bp, sp;
};
*/
union omr_encoding {
struct {
u8 omr_source : 4;
u8 omr_remote : 1;
u8 omr_hitm : 1;
u8 omr_snoop : 1;
u8 omr_promoted : 1;
};
u8 omr_full;
};
union intel_x86_pebs_dse {
u64 val;
struct {
unsigned int ld_dse:4;
unsigned int ld_stlb_miss:1;
unsigned int ld_locked:1;
unsigned int ld_data_blk:1;
unsigned int ld_addr_blk:1;
unsigned int ld_reserved:24;
};
struct {
unsigned int st_l1d_hit:1;
unsigned int st_reserved1:3;
unsigned int st_stlb_miss:1;
unsigned int st_locked:1;
unsigned int st_reserved2:26;
};
struct {
unsigned int st_lat_dse:4;
unsigned int st_lat_stlb_miss:1;
unsigned int st_lat_locked:1;
unsigned int ld_reserved3:26;
};
struct {
unsigned int mtl_dse:5;
unsigned int mtl_locked:1;
unsigned int mtl_stlb_miss:1;
unsigned int mtl_fwd_blk:1;
unsigned int ld_reserved4:24;
};
struct {
unsigned int lnc_dse:8;
unsigned int ld_reserved5:2;
unsigned int lnc_stlb_miss:1;
unsigned int lnc_locked:1;
unsigned int lnc_data_blk:1;
unsigned int lnc_addr_blk:1;
unsigned int ld_reserved6:18;
};
struct {
unsigned int pnc_dse: 8;
unsigned int pnc_l2_miss:1;
unsigned int pnc_stlb_clean_hit:1;
unsigned int pnc_stlb_any_hit:1;
unsigned int pnc_stlb_miss:1;
unsigned int pnc_locked:1;
unsigned int pnc_data_blk:1;
unsigned int pnc_addr_blk:1;
unsigned int pnc_fb_full:1;
unsigned int ld_reserved8:16;
};
struct {
unsigned int arw_dse:8;
unsigned int arw_l2_miss:1;
unsigned int arw_xq_promotion:1;
unsigned int arw_reissue:1;
unsigned int arw_stlb_miss:1;
unsigned int arw_locked:1;
unsigned int arw_data_blk:1;
unsigned int arw_addr_blk:1;
unsigned int arw_fb_full:1;
unsigned int ld_reserved9:16;
};
};
/*
* Map PEBS Load Latency Data Source encodings to generic
* memory data source information
*/
#define P(a, b) PERF_MEM_S(a, b)
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/types.h`, `linux/slab.h`, `linux/sched/clock.h`, `asm/cpu_entry_area.h`, `asm/debugreg.h`, `asm/perf_event.h`, `asm/tlbflush.h`.
- Detected declarations: `struct pebs_record_32`, `struct pebs_record_core`, `struct pebs_record_nhm`, `struct pebs_record_hsw`, `struct pebs_record_skl`, `struct bts_record`, `function intel_pmu_pebs_data_source_nhm`, `function __intel_pmu_pebs_data_source_skl`, `function intel_pmu_pebs_data_source_skl`, `function __intel_pmu_pebs_data_source_grt`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.