arch/x86/include/asm/acrn.h
Source file repositories/reference/linux-study-clean/arch/x86/include/asm/acrn.h
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/include/asm/acrn.h- Extension
.h- Size
- 2195 bytes
- Lines
- 95
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/cpuid/api.h
Detected Declarations
function acrn_cpuid_basefunction acrn_get_tsc_khzfunction acrn_hypercall0function acrn_hypercall1function acrn_hypercall2
Annotated Snippet
#ifndef _ASM_X86_ACRN_H
#define _ASM_X86_ACRN_H
#include <asm/cpuid/api.h>
/*
* This CPUID returns feature bitmaps in EAX.
* Guest VM uses this to detect the appropriate feature bit.
*/
#define ACRN_CPUID_FEATURES 0x40000001
/* Bit 0 indicates whether guest VM is privileged */
#define ACRN_FEATURE_PRIVILEGED_VM BIT(0)
/*
* Timing Information.
* This leaf returns the current TSC frequency in kHz.
*
* EAX: (Virtual) TSC frequency in kHz.
* EBX, ECX, EDX: RESERVED (reserved fields are set to zero).
*/
#define ACRN_CPUID_TIMING_INFO 0x40000010
void acrn_setup_intr_handler(void (*handler)(void));
void acrn_remove_intr_handler(void);
static inline u32 acrn_cpuid_base(void)
{
if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
return cpuid_base_hypervisor("ACRNACRNACRN", 0);
return 0;
}
static inline unsigned long acrn_get_tsc_khz(void)
{
return cpuid_eax(ACRN_CPUID_TIMING_INFO);
}
/*
* Hypercalls for ACRN
*
* - VMCALL instruction is used to implement ACRN hypercalls.
* - ACRN hypercall ABI:
* - Hypercall number is passed in R8 register.
* - Up to 2 arguments are passed in RDI, RSI.
* - Return value will be placed in RAX.
*
* Because GCC doesn't support R8 register as direct register constraints, use
* supported constraint as input with a explicit MOV to R8 in beginning of asm.
*/
static inline long acrn_hypercall0(unsigned long hcall_id)
{
long result;
asm volatile("movl %1, %%r8d\n\t"
"vmcall\n\t"
: "=a" (result)
: "g" (hcall_id)
: "r8", "memory");
return result;
}
static inline long acrn_hypercall1(unsigned long hcall_id,
unsigned long param1)
{
long result;
asm volatile("movl %1, %%r8d\n\t"
"vmcall\n\t"
: "=a" (result)
: "g" (hcall_id), "D" (param1)
: "r8", "memory");
return result;
}
static inline long acrn_hypercall2(unsigned long hcall_id,
unsigned long param1,
unsigned long param2)
{
long result;
asm volatile("movl %1, %%r8d\n\t"
"vmcall\n\t"
: "=a" (result)
: "g" (hcall_id), "D" (param1), "S" (param2)
: "r8", "memory");
return result;
Annotation
- Immediate include surface: `asm/cpuid/api.h`.
- Detected declarations: `function acrn_cpuid_base`, `function acrn_get_tsc_khz`, `function acrn_hypercall0`, `function acrn_hypercall1`, `function acrn_hypercall2`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.