arch/x86/include/asm/pgtable_areas.h

Source file repositories/reference/linux-study-clean/arch/x86/include/asm/pgtable_areas.h

File Facts

System: Linux kernel
Corpus path: arch/x86/include/asm/pgtable_areas.h
Extension: .h
Size: 623 bytes
Lines: 23
Domain: Architecture Layer
Bucket: arch/x86
Inferred role: Architecture Layer: implementation source
Status: source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

asm/pgtable_32_areas.h

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _ASM_X86_PGTABLE_AREAS_H
#define _ASM_X86_PGTABLE_AREAS_H

#ifdef CONFIG_X86_32
# include <asm/pgtable_32_areas.h>
#endif

/* Single page reserved for the readonly IDT mapping: */
#define CPU_ENTRY_AREA_RO_IDT		CPU_ENTRY_AREA_BASE
#define CPU_ENTRY_AREA_PER_CPU		(CPU_ENTRY_AREA_RO_IDT + PAGE_SIZE)

#define CPU_ENTRY_AREA_RO_IDT_VADDR	((void *)CPU_ENTRY_AREA_RO_IDT)

#ifdef CONFIG_X86_32
#define CPU_ENTRY_AREA_MAP_SIZE		(CPU_ENTRY_AREA_PER_CPU +		\
					 (CPU_ENTRY_AREA_SIZE * NR_CPUS) -	\
					 CPU_ENTRY_AREA_BASE)
#else
#define CPU_ENTRY_AREA_MAP_SIZE		P4D_SIZE
#endif

#endif /* _ASM_X86_PGTABLE_AREAS_H */

Annotation

Immediate include surface: `asm/pgtable_32_areas.h`.
Atlas domain: Architecture Layer / arch/x86.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.