arch/x86/include/asm/ptrace.h

Source file repositories/reference/linux-study-clean/arch/x86/include/asm/ptrace.h

File Facts

System
Linux kernel
Corpus path
arch/x86/include/asm/ptrace.h
Extension
.h
Size
12313 bytes
Lines
474
Domain
Architecture Layer
Bucket
arch/x86
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

struct pt_regs {
	/*
	 * NB: 32-bit x86 CPUs are inconsistent as what happens in the
	 * following cases (where %seg represents a segment register):
	 *
	 * - pushl %seg: some do a 16-bit write and leave the high
	 *   bits alone
	 * - movl %seg, [mem]: some do a 16-bit write despite the movl
	 * - IDT entry: some (e.g. 486) will leave the high bits of CS
	 *   and (if applicable) SS undefined.
	 *
	 * Fortunately, x86-32 doesn't read the high bits on POP or IRET,
	 * so we can just treat all of the segment registers as 16-bit
	 * values.
	 */
	unsigned long bx;
	unsigned long cx;
	unsigned long dx;
	unsigned long si;
	unsigned long di;
	unsigned long bp;
	unsigned long ax;
	unsigned short ds;
	unsigned short __dsh;
	unsigned short es;
	unsigned short __esh;
	unsigned short fs;
	unsigned short __fsh;
	/*
	 * On interrupt, gs and __gsh store the vector number.  They never
	 * store gs any more.
	 */
	unsigned short gs;
	unsigned short __gsh;
	/* On interrupt, this is the error code. */
	unsigned long orig_ax;
	unsigned long ip;
	unsigned short cs;
	unsigned short __csh;
	unsigned long flags;
	unsigned long sp;
	unsigned short ss;
	unsigned short __ssh;
};

#else /* __i386__ */

struct fred_cs {
		/* CS selector */
	u64	cs	: 16,
		/* Stack level at event time */
		sl	:  2,
		/* IBT in WAIT_FOR_ENDBRANCH state */
		wfe	:  1,
			: 45;
};

struct fred_ss {
		/* SS selector */
	u64	ss	: 16,
		/* STI state */
		sti	:  1,
		/* Set if syscall, sysenter or INT n */
		swevent	:  1,
		/* Event is NMI type */
		nmi	:  1,
			: 13,
		/* Event vector */
		vector	:  8,
			:  8,
		/* Event type */
		type	:  4,
			:  4,
		/* Event was incident to enclave execution */
		enclave	:  1,
		/* CPU was in 64-bit mode */
		l	:  1,
		/*
		 * Nested exception during FRED delivery, not set
		 * for #DF.
		 */
		nested	:  1,
			:  1,
		/*
		 * The length of the instruction causing the event.
		 * Only set for INTO, INT1, INT3, INT n, SYSCALL
		 * and SYSENTER.  0 otherwise.
		 */
		insnlen	:  4;
};

Annotation

Implementation Notes