arch/x86/include/asm/thread_info.h

Source file repositories/reference/linux-study-clean/arch/x86/include/asm/thread_info.h

File Facts

System
Linux kernel
Corpus path
arch/x86/include/asm/thread_info.h
Extension
.h
Size
7255 bytes
Lines
232
Domain
Architecture Layer
Bucket
arch/x86
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

struct thread_info {
	unsigned long		flags;		/* low level flags */
	unsigned long		syscall_work;	/* SYSCALL_WORK_ flags */
	u32			status;		/* thread synchronous flags */
#ifdef CONFIG_SMP
	u32			cpu;		/* current CPU */
#endif
};

#define INIT_THREAD_INFO(tsk)			\
{						\
	.flags		= 0,			\
}

#else /* !__ASSEMBLER__ */

#include <asm/asm-offsets.h>

#endif

/*
 * Tell the generic TIF infrastructure which bits x86 supports
 */
#define HAVE_TIF_NEED_RESCHED_LAZY
#define HAVE_TIF_POLLING_NRFLAG
#define HAVE_TIF_SINGLESTEP

#include <asm-generic/thread_info_tif.h>

/* Architecture specific TIF space starts at 16 */
#define TIF_SSBD		16	/* Speculative store bypass disable */
#define TIF_SPEC_IB		17	/* Indirect branch speculation mitigation */
#define TIF_SPEC_L1D_FLUSH	18	/* Flush L1D on mm switches (processes) */
#define TIF_NEED_FPU_LOAD	19	/* load FPU on return to userspace */
#define TIF_NOCPUID		20	/* CPUID is not accessible in userland */
#define TIF_NOTSC		21	/* TSC is not accessible in userland */
#define TIF_IO_BITMAP		22	/* uses I/O bitmap */
#define TIF_SPEC_FORCE_UPDATE	23	/* Force speculation MSR update in context switch */
#define TIF_FORCED_TF		24	/* true if TF in eflags artificially */
#define TIF_SINGLESTEP		25	/* reenable singlestep on user return*/
#define TIF_BLOCKSTEP		26	/* set when we want DEBUGCTLMSR_BTF */
#define TIF_ADDR32		27	/* 32-bit address space on 64 bits */

#define _TIF_SSBD		BIT(TIF_SSBD)
#define _TIF_SPEC_IB		BIT(TIF_SPEC_IB)
#define _TIF_SPEC_L1D_FLUSH	BIT(TIF_SPEC_L1D_FLUSH)
#define _TIF_NEED_FPU_LOAD	BIT(TIF_NEED_FPU_LOAD)
#define _TIF_NOCPUID		BIT(TIF_NOCPUID)
#define _TIF_NOTSC		BIT(TIF_NOTSC)
#define _TIF_IO_BITMAP		BIT(TIF_IO_BITMAP)
#define _TIF_SPEC_FORCE_UPDATE	BIT(TIF_SPEC_FORCE_UPDATE)
#define _TIF_FORCED_TF		BIT(TIF_FORCED_TF)
#define _TIF_BLOCKSTEP		BIT(TIF_BLOCKSTEP)
#define _TIF_SINGLESTEP		BIT(TIF_SINGLESTEP)
#define _TIF_ADDR32		BIT(TIF_ADDR32)

/* flags to check in __switch_to() */
#define _TIF_WORK_CTXSW_BASE					\
	(_TIF_NOCPUID | _TIF_NOTSC | _TIF_BLOCKSTEP |		\
	 _TIF_SSBD | _TIF_SPEC_FORCE_UPDATE)

/*
 * Avoid calls to __switch_to_xtra() on UP as STIBP is not evaluated.
 */
#ifdef CONFIG_SMP
# define _TIF_WORK_CTXSW	(_TIF_WORK_CTXSW_BASE | _TIF_SPEC_IB)
#else
# define _TIF_WORK_CTXSW	(_TIF_WORK_CTXSW_BASE)
#endif

#ifdef CONFIG_X86_IOPL_IOPERM
# define _TIF_WORK_CTXSW_PREV	(_TIF_WORK_CTXSW| _TIF_USER_RETURN_NOTIFY | \
				 _TIF_IO_BITMAP)
#else
# define _TIF_WORK_CTXSW_PREV	(_TIF_WORK_CTXSW| _TIF_USER_RETURN_NOTIFY)
#endif

#define _TIF_WORK_CTXSW_NEXT	(_TIF_WORK_CTXSW)

#define STACK_WARN		(THREAD_SIZE/8)

/*
 * macros/functions for gaining access to the thread information structure
 *
 * preempt_count needs to be 1 initially, until the scheduler is functional.
 */
#ifndef __ASSEMBLER__

/*
 * Walks up the stack frames to make sure that the specified object is

Annotation

Implementation Notes