arch/x86/include/asm/tlb.h
Source file repositories/reference/linux-study-clean/arch/x86/include/asm/tlb.h
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/include/asm/tlb.h- Extension
.h- Size
- 5292 bytes
- Lines
- 167
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm-generic/tlb.hlinux/kernel.hvdso/bits.hvdso/page.h
Detected Declarations
enum addr_stridefunction tlb_flushfunction invlpgfunction invalidatefunction __invlpgb_allfunction __tlbsyncfunction __invlpgbfunction invlpgb_flush_single_pcid_nosyncfunction invlpgb_flush_allfunction invlpgb_flush_addr_nosyncfunction invlpgb_flush_all_nonglobals
Annotated Snippet
static inline void __invlpgb_all(unsigned long asid, unsigned long pcid, u8 flags) { }
static inline void __tlbsync(void) { }
#endif
static inline void invlpgb_flush_user_nr_nosync(unsigned long pcid,
unsigned long addr,
u16 nr, bool stride)
{
enum addr_stride str = stride ? PMD_STRIDE : PTE_STRIDE;
u8 flags = INVLPGB_FLAG_PCID | INVLPGB_FLAG_VA;
__invlpgb(0, pcid, addr, nr, str, flags);
}
/* Flush all mappings for a given PCID, not including globals. */
static inline void invlpgb_flush_single_pcid_nosync(unsigned long pcid)
{
__invlpgb_all(0, pcid, INVLPGB_FLAG_PCID);
}
/* Flush all mappings, including globals, for all PCIDs. */
static inline void invlpgb_flush_all(void)
{
/*
* TLBSYNC at the end needs to make sure all flushes done on the
* current CPU have been executed system-wide. Therefore, make
* sure nothing gets migrated in-between but disable preemption
* as it is cheaper.
*/
guard(preempt)();
__invlpgb_all(0, 0, INVLPGB_FLAG_INCLUDE_GLOBAL);
__tlbsync();
}
/* Flush addr, including globals, for all PCIDs. */
static inline void invlpgb_flush_addr_nosync(unsigned long addr, u16 nr)
{
__invlpgb(0, 0, addr, nr, PTE_STRIDE, INVLPGB_FLAG_INCLUDE_GLOBAL);
}
/* Flush all mappings for all PCIDs except globals. */
static inline void invlpgb_flush_all_nonglobals(void)
{
guard(preempt)();
__invlpgb_all(0, 0, INVLPGB_MODE_ALL_NONGLOBALS);
__tlbsync();
}
#endif /* _ASM_X86_TLB_H */
Annotation
- Immediate include surface: `asm-generic/tlb.h`, `linux/kernel.h`, `vdso/bits.h`, `vdso/page.h`.
- Detected declarations: `enum addr_stride`, `function tlb_flush`, `function invlpg`, `function invalidate`, `function __invlpgb_all`, `function __tlbsync`, `function __invlpgb`, `function invlpgb_flush_single_pcid_nosync`, `function invlpgb_flush_all`, `function invlpgb_flush_addr_nosync`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.