arch/x86/include/asm/tlbbatch.h

File Facts

System

Linux kernel

Corpus path

arch/x86/include/asm/tlbbatch.h

Extension

.h

Size

467 bytes

Lines

21

Domain

Architecture Layer

Bucket

arch/x86

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/cpumask.h

Detected Declarations

• struct arch_tlbflush_unmap_batch

Annotated Snippet

struct arch_tlbflush_unmap_batch {
	/*
	 * Each bit set is a CPU that potentially has a TLB entry for one of
	 * the PFNs being flushed..
	 */
	struct cpumask cpumask;
	/*
	 * Set if pages were unmapped from any MM, even one that does not
	 * have active CPUs in its cpumask.
	 */
	bool unmapped_pages;
};

#endif /* _ARCH_X86_TLBBATCH_H */

Annotation

• Immediate include surface: `linux/cpumask.h`.
• Detected declarations: `struct arch_tlbflush_unmap_batch`.
• Atlas domain: Architecture Layer / arch/x86.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.