arch/x86/include/asm/user.h
Source file repositories/reference/linux-study-clean/arch/x86/include/asm/user.h
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/include/asm/user.h- Extension
.h- Size
- 2257 bytes
- Lines
- 65
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/user_32.hasm/user_64.hasm/types.h
Detected Declarations
struct user_ymmh_regsstruct user_xstate_headerstruct user_xstateregs
Annotated Snippet
struct user_ymmh_regs {
/* 16 * 16 bytes for each YMMH-reg */
__u32 ymmh_space[64];
};
struct user_xstate_header {
__u64 xfeatures;
__u64 reserved1[2];
__u64 reserved2[5];
};
/*
* The structure layout of user_xstateregs, used for exporting the
* extended register state through ptrace and core-dump (NT_X86_XSTATE note)
* interfaces will be same as the memory layout of xsave used by the processor
* (except for the bytes 464..511, which can be used by the software) and hence
* the size of this structure varies depending on the features supported by the
* processor and OS. The size of the structure that users need to use can be
* obtained by doing:
* cpuid_count(0xd, 0, &eax, &ptrace_xstateregs_struct_size, &ecx, &edx);
* i.e., cpuid.(eax=0xd,ecx=0).ebx will be the size that user (debuggers, etc.)
* need to use.
*
* For now, only the first 8 bytes of the software usable bytes[464..471] will
* be used and will be set to OS enabled xstate mask (which is same as the
* 64bit mask returned by the xgetbv's xCR0). Users (analyzing core dump
* remotely, etc.) can use this mask as well as the mask saved in the
* xstate_hdr bytes and interpret what states the processor/OS supports
* and what states are in modified/initialized conditions for the
* particular process/thread.
*
* Also when the user modifies certain state FP/SSE/etc through the
* ptrace interface, they must ensure that the header.xfeatures
* bytes[512..519] of the memory layout are updated correspondingly.
* i.e., for example when FP state is modified to a non-init state,
* header.xfeatures's bit 0 must be set to '1', when SSE is modified to
* non-init state, header.xfeatures's bit 1 must to be set to '1', etc.
*/
#define USER_XSTATE_FX_SW_WORDS 6
#define USER_XSTATE_XCR0_WORD 0
struct user_xstateregs {
struct {
__u64 fpx_space[58];
__u64 xstate_fx_sw[USER_XSTATE_FX_SW_WORDS];
} i387;
struct user_xstate_header header;
struct user_ymmh_regs ymmh;
/* further processor state extensions go here */
};
#endif /* _ASM_X86_USER_H */
Annotation
- Immediate include surface: `asm/user_32.h`, `asm/user_64.h`, `asm/types.h`.
- Detected declarations: `struct user_ymmh_regs`, `struct user_xstate_header`, `struct user_xstateregs`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.