arch/x86/kernel/amd_gart_64.c
Source file repositories/reference/linux-study-clean/arch/x86/kernel/amd_gart_64.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/kernel/amd_gart_64.c- Extension
.c- Size
- 21747 bytes
- Lines
- 848
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/ctype.hlinux/agp_backend.hlinux/init.hlinux/mm.hlinux/sched.hlinux/sched/debug.hlinux/string.hlinux/spinlock.hlinux/pci.hlinux/topology.hlinux/interrupt.hlinux/bitmap.hlinux/kdebug.hlinux/scatterlist.hlinux/iommu-helper.hlinux/syscore_ops.hlinux/io.hlinux/gfp.hlinux/atomic.hlinux/dma-direct.hlinux/dma-map-ops.hasm/mtrr.hasm/proto.hasm/iommu.hasm/gart.hasm/set_memory.hasm/dma.hasm/amd/nb.hasm/x86_init.h
Detected Declarations
function alloc_iommufunction free_iommufunction flush_gartfunction dump_leakfunction iommu_fullfunction need_iommufunction nonforced_iommufunction dma_map_areafunction gart_map_physfunction gart_unmap_physfunction gart_unmap_sgfunction for_each_sgfunction dma_map_sg_nonforcefunction for_each_sgfunction __dma_map_contfunction for_each_sgfunction dma_map_contfunction gart_map_sgfunction for_each_sgfunction gart_alloc_coherentfunction gart_free_coherentfunction check_iommu_sizefunction read_aperturefunction enable_gart_translationsfunction set_up_gart_resumefunction gart_fixup_northbridgesfunction gart_resumefunction init_amd_gattfunction gart_iommu_shutdownfunction gart_iommu_initfunction gart_parse_options
Annotated Snippet
if (next_bit >= iommu_pages) {
next_bit = 0;
need_flush = true;
}
}
if (iommu_fullflush)
need_flush = true;
spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
return offset;
}
static void free_iommu(unsigned long offset, int size)
{
unsigned long flags;
spin_lock_irqsave(&iommu_bitmap_lock, flags);
bitmap_clear(iommu_gart_bitmap, offset, size);
if (offset >= next_bit)
next_bit = offset + size;
spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
}
/*
* Use global flush state to avoid races with multiple flushers.
*/
static void flush_gart(void)
{
unsigned long flags;
spin_lock_irqsave(&iommu_bitmap_lock, flags);
if (need_flush) {
amd_flush_garts();
need_flush = false;
}
spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
}
#ifdef CONFIG_IOMMU_LEAK
/* Debugging aid for drivers that don't free their IOMMU tables */
static void dump_leak(void)
{
static int dump;
if (dump)
return;
dump = 1;
show_stack(NULL, NULL, KERN_ERR);
debug_dma_dump_mappings(NULL);
}
#endif
static void iommu_full(struct device *dev, size_t size, int dir)
{
/*
* Ran out of IOMMU space for this operation. This is very bad.
* Unfortunately the drivers cannot handle this operation properly.
* Return some non mapped prereserved space in the aperture and
* let the Northbridge deal with it. This will result in garbage
* in the IO operation. When the size exceeds the prereserved space
* memory corruption will occur or random memory will be DMAed
* out. Hopefully no network devices use single mappings that big.
*/
dev_err(dev, "PCI-DMA: Out of IOMMU space for %lu bytes\n", size);
#ifdef CONFIG_IOMMU_LEAK
dump_leak();
#endif
}
static inline int
need_iommu(struct device *dev, unsigned long addr, size_t size)
{
return force_iommu || !dma_capable(dev, addr, size, true);
}
static inline int
nonforced_iommu(struct device *dev, unsigned long addr, size_t size)
{
return !dma_capable(dev, addr, size, true);
}
/* Map a single continuous physical area into the IOMMU.
* Caller needs to check if the iommu is needed and flush.
*/
static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem,
size_t size, int dir, unsigned long align_mask)
{
unsigned long npages = iommu_num_pages(phys_mem, size, PAGE_SIZE);
Annotation
- Immediate include surface: `linux/types.h`, `linux/ctype.h`, `linux/agp_backend.h`, `linux/init.h`, `linux/mm.h`, `linux/sched.h`, `linux/sched/debug.h`, `linux/string.h`.
- Detected declarations: `function alloc_iommu`, `function free_iommu`, `function flush_gart`, `function dump_leak`, `function iommu_full`, `function need_iommu`, `function nonforced_iommu`, `function dma_map_area`, `function gart_map_phys`, `function gart_unmap_phys`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.