arch/x86/kernel/apic/apic.c
Source file repositories/reference/linux-study-clean/arch/x86/kernel/apic/apic.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/kernel/apic/apic.c- Extension
.c- Size
- 68311 bytes
- Lines
- 2701
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/perf_event.hlinux/kernel_stat.hlinux/mc146818rtc.hlinux/acpi_pmtmr.hlinux/bitmap.hlinux/clockchips.hlinux/interrupt.hlinux/memblock.hlinux/ftrace.hlinux/ioport.hlinux/export.hlinux/syscore_ops.hlinux/delay.hlinux/timex.hlinux/i8253.hlinux/dmar.hlinux/init.hlinux/cpu.hlinux/dmi.hlinux/smp.hlinux/mm.hlinux/kvm_types.hxen/xen.hasm/trace/irq_vectors.hasm/irq_remapping.hasm/pc-conf-reg.hasm/perf_event.hasm/x86_init.hlinux/atomic.hasm/barrier.hasm/mpspec.hasm/i8259.h
Detected Declarations
function apic_accessiblefunction registerfunction imcr_apic_to_picfunction parse_lapicfunction setup_apicpmtimerfunction lapic_get_versionfunction lapic_is_integratedfunction modern_apicfunction apic_disablefunction native_apic_icr_writefunction native_apic_icr_readfunction lapic_get_maxlvtfunction __setup_APIC_LVTTfunction eilvt_entry_is_changeablefunction reserve_eilvt_offsetfunction setup_APIC_eilvtfunction lapic_next_eventfunction lapic_next_deadlinefunction lapic_timer_shutdownfunction lapic_timer_set_periodic_oneshotfunction lapic_timer_set_periodicfunction lapic_timer_set_oneshotfunction lapic_timer_broadcastfunction apic_validate_deadline_timerfunction setup_APIC_timerfunction __lapic_update_tsc_freqfunction lapic_update_tsc_freqfunction lapic_cal_handlerfunction calibrate_by_pmtimerfunction lapic_init_clockeventfunction apic_needs_pitfunction calibrate_APIC_clockfunction setup_boot_APIC_clockfunction setup_secondary_APIC_clockfunction local_apic_timer_interruptfunction clear_local_APICfunction disable_local_APICfunction disable_local_APICfunction lapic_shutdownfunction sync_Arb_IDsfunction __apic_intr_mode_selectfunction APIC_INTEGRATEDfunction apic_intr_mode_selectfunction init_bsp_APICfunction apic_intr_mode_initfunction lapic_setup_esrfunction apic_check_and_eoi_isrfunction apic_clear_isr
Annotated Snippet
core_initcall(init_lapic_sysfs);
#else /* CONFIG_PM */
static void apic_pm_activate(void) { }
#endif /* CONFIG_PM */
#ifdef CONFIG_X86_64
static int multi_checked;
static int multi;
static int set_multi(const struct dmi_system_id *d)
{
if (multi)
return 0;
pr_info("APIC: %s detected, Multi Chassis\n", d->ident);
multi = 1;
return 0;
}
static const struct dmi_system_id multi_dmi_table[] = {
{
.callback = set_multi,
.ident = "IBM System Summit2",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
DMI_MATCH(DMI_PRODUCT_NAME, "Summit2"),
},
},
{}
};
static void dmi_check_multi(void)
{
if (multi_checked)
return;
dmi_check_system(multi_dmi_table);
multi_checked = 1;
}
/*
* apic_is_clustered_box() -- Check if we can expect good TSC
*
* Thus far, the major user of this is IBM's Summit2 series:
* Clustered boxes may have unsynced TSC problems if they are
* multi-chassis.
* Use DMI to check them
*/
int apic_is_clustered_box(void)
{
dmi_check_multi();
return multi;
}
#endif
/*
* APIC command line parameters
*/
static int __init setup_nolapic(char *arg)
{
apic_is_disabled = true;
setup_clear_cpu_cap(X86_FEATURE_APIC);
return 0;
}
early_param("nolapic", setup_nolapic);
static int __init parse_lapic_timer_c2_ok(char *arg)
{
local_apic_timer_c2_ok = 1;
return 0;
}
early_param("lapic_timer_c2_ok", parse_lapic_timer_c2_ok);
static int __init parse_disable_apic_timer(char *arg)
{
disable_apic_timer = 1;
return 0;
}
early_param("noapictimer", parse_disable_apic_timer);
static int __init parse_nolapic_timer(char *arg)
{
disable_apic_timer = 1;
return 0;
}
early_param("nolapic_timer", parse_nolapic_timer);
Annotation
- Immediate include surface: `linux/perf_event.h`, `linux/kernel_stat.h`, `linux/mc146818rtc.h`, `linux/acpi_pmtmr.h`, `linux/bitmap.h`, `linux/clockchips.h`, `linux/interrupt.h`, `linux/memblock.h`.
- Detected declarations: `function apic_accessible`, `function register`, `function imcr_apic_to_pic`, `function parse_lapic`, `function setup_apicpmtimer`, `function lapic_get_version`, `function lapic_is_integrated`, `function modern_apic`, `function apic_disable`, `function native_apic_icr_write`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.