arch/x86/kernel/apic/apic_numachip.c
Source file repositories/reference/linux-study-clean/arch/x86/kernel/apic/apic_numachip.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/kernel/apic/apic_numachip.c- Extension
.c- Size
- 6529 bytes
- Lines
- 273
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/init.hlinux/pgtable.hasm/msr.hasm/numachip/numachip.hasm/numachip/numachip_csr.hlocal.h
Detected Declarations
function numachip1_get_apic_idfunction numachip2_get_apic_idfunction numachip1_apic_icr_writefunction numachip2_apic_icr_writefunction numachip_wakeup_secondaryfunction numachip_send_IPI_onefunction numachip_send_IPI_maskfunction numachip_send_IPI_mask_allbutselffunction for_each_cpufunction numachip_send_IPI_allbutselffunction for_each_online_cpufunction numachip_send_IPI_allfunction numachip_send_IPI_selffunction numachip1_probefunction numachip2_probefunction fixup_cpu_idfunction numachip_system_initfunction numachip1_acpi_madt_oem_checkfunction numachip2_acpi_madt_oem_check
Annotated Snippet
#include <linux/types.h>
#include <linux/init.h>
#include <linux/pgtable.h>
#include <asm/msr.h>
#include <asm/numachip/numachip.h>
#include <asm/numachip/numachip_csr.h>
#include "local.h"
u8 numachip_system __read_mostly;
static const struct apic apic_numachip1;
static const struct apic apic_numachip2;
static void (*numachip_apic_icr_write)(int apicid, unsigned int val) __read_mostly;
static u32 numachip1_get_apic_id(u32 x)
{
unsigned long value;
unsigned int id = (x >> 24) & 0xff;
if (static_cpu_has(X86_FEATURE_NODEID_MSR)) {
rdmsrq(MSR_FAM10H_NODE_ID, value);
id |= (value << 2) & 0xff00;
}
return id;
}
static u32 numachip2_get_apic_id(u32 x)
{
u64 mcfg;
rdmsrq(MSR_FAM10H_MMIO_CONF_BASE, mcfg);
return ((mcfg >> (28 - 8)) & 0xfff00) | (x >> 24);
}
static void numachip1_apic_icr_write(int apicid, unsigned int val)
{
write_lcsr(CSR_G3_EXT_IRQ_GEN, (apicid << 16) | val);
}
static void numachip2_apic_icr_write(int apicid, unsigned int val)
{
numachip2_write32_lcsr(NUMACHIP2_APIC_ICR, (apicid << 12) | val);
}
static int numachip_wakeup_secondary(u32 phys_apicid, unsigned long start_rip, unsigned int cpu)
{
numachip_apic_icr_write(phys_apicid, APIC_DM_INIT);
numachip_apic_icr_write(phys_apicid, APIC_DM_STARTUP |
(start_rip >> 12));
return 0;
}
static void numachip_send_IPI_one(int cpu, int vector)
{
int local_apicid, apicid = per_cpu(x86_cpu_to_apicid, cpu);
unsigned int dmode;
preempt_disable();
local_apicid = __this_cpu_read(x86_cpu_to_apicid);
/* Send via local APIC where non-local part matches */
if (!((apicid ^ local_apicid) >> NUMACHIP_LAPIC_BITS)) {
unsigned long flags;
local_irq_save(flags);
__default_send_IPI_dest_field(apicid, vector,
APIC_DEST_PHYSICAL);
local_irq_restore(flags);
preempt_enable();
return;
}
preempt_enable();
dmode = (vector == NMI_VECTOR) ? APIC_DM_NMI : APIC_DM_FIXED;
numachip_apic_icr_write(apicid, dmode | vector);
}
static void numachip_send_IPI_mask(const struct cpumask *mask, int vector)
{
unsigned int cpu;
for_each_cpu(cpu, mask)
numachip_send_IPI_one(cpu, vector);
}
static void numachip_send_IPI_mask_allbutself(const struct cpumask *mask,
Annotation
- Immediate include surface: `linux/types.h`, `linux/init.h`, `linux/pgtable.h`, `asm/msr.h`, `asm/numachip/numachip.h`, `asm/numachip/numachip_csr.h`, `local.h`.
- Detected declarations: `function numachip1_get_apic_id`, `function numachip2_get_apic_id`, `function numachip1_apic_icr_write`, `function numachip2_apic_icr_write`, `function numachip_wakeup_secondary`, `function numachip_send_IPI_one`, `function numachip_send_IPI_mask`, `function numachip_send_IPI_mask_allbutself`, `function for_each_cpu`, `function numachip_send_IPI_allbutself`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.