arch/x86/kernel/cpu/mce/internal.h

Source file repositories/reference/linux-study-clean/arch/x86/kernel/cpu/mce/internal.h

File Facts

System
Linux kernel
Corpus path
arch/x86/kernel/cpu/mce/internal.h
Extension
.h
Size
9809 bytes
Lines
353
Domain
Architecture Layer
Bucket
arch/x86
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mce_evt_llist {
	struct llist_node llnode;
	struct mce_hw_err err;
};

void mce_gen_pool_process(struct work_struct *__unused);
bool mce_gen_pool_empty(void);
bool mce_gen_pool_add(struct mce_hw_err *err);
bool mce_gen_pool_init(void);
struct llist_node *mce_gen_pool_prepare_records(void);

int mce_severity(struct mce *a, struct pt_regs *regs, char **msg, bool is_excp);
struct dentry *mce_get_debugfs_dir(void);

extern mce_banks_t mce_banks_ce_disabled;

#ifdef CONFIG_X86_MCE_INTEL
void mce_intel_handle_storm(int bank, bool on);
void cmci_disable_bank(int bank);
void intel_init_cmci(void);
void intel_init_lmce(void);
void intel_clear_lmce(void);
bool intel_filter_mce(struct mce *m);
bool intel_mce_usable_address(struct mce *m);
#else
static inline void mce_intel_handle_storm(int bank, bool on) { }
static inline void cmci_disable_bank(int bank) { }
static inline void intel_init_cmci(void) { }
static inline void intel_init_lmce(void) { }
static inline void intel_clear_lmce(void) { }
static inline bool intel_filter_mce(struct mce *m) { return false; }
static inline bool intel_mce_usable_address(struct mce *m) { return false; }
#endif

void mce_timer_kick(bool storm);

#ifdef CONFIG_X86_MCE_THRESHOLD
void cmci_storm_begin(unsigned int bank);
void cmci_storm_end(unsigned int bank);
void mce_track_storm(struct mce *mce);
void mce_inherit_storm(unsigned int bank);
bool mce_get_storm_mode(void);
void mce_set_storm_mode(bool storm);
u32  mce_get_apei_thr_limit(void);
#else
static inline void cmci_storm_begin(unsigned int bank) {}
static inline void cmci_storm_end(unsigned int bank) {}
static inline void mce_track_storm(struct mce *mce) {}
static inline void mce_inherit_storm(unsigned int bank) {}
static inline bool mce_get_storm_mode(void) { return false; }
static inline void mce_set_storm_mode(bool storm) {}
static inline u32  mce_get_apei_thr_limit(void) { return 0; }
#endif

/*
 * history:		Bitmask tracking errors occurrence. Each set bit
 *			represents an error seen.
 *
 * timestamp:		Last time (in jiffies) that the bank was polled.
 * in_storm_mode:	Is this bank in storm mode?
 * poll_only:		Bank does not support CMCI, skip storm tracking.
 */
struct storm_bank {
	u64 history;
	u64 timestamp;
	bool in_storm_mode;
	bool poll_only;
};

#define NUM_HISTORY_BITS (sizeof(u64) * BITS_PER_BYTE)

/* How many errors within the history buffer mark the start of a storm. */
#define STORM_BEGIN_THRESHOLD	5

/*
 * How many polls of machine check bank without an error before declaring
 * the storm is over. Since it is tracked by the bitmasks in the history
 * field of struct storm_bank the mask is 30 bits [0 ... 29].
 */
#define STORM_END_POLL_THRESHOLD	29

/*
 * banks:		per-cpu, per-bank details
 * stormy_bank_count:	count of MC banks in storm state
 * poll_mode:		CPU is in poll mode
 */
struct mca_storm_desc {
	struct storm_bank	banks[MAX_NR_BANKS];
	u8			stormy_bank_count;
	bool			poll_mode;

Annotation

Implementation Notes