arch/x86/kernel/cpu/resctrl/ctrlmondata.c
Source file repositories/reference/linux-study-clean/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/kernel/cpu/resctrl/ctrlmondata.c- Extension
.c- Size
- 3495 bytes
- Lines
- 134
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/cpu.hinternal.h
Detected Declarations
function Technologyfunction resctrl_arch_update_domainsfunction list_for_each_entryfunction resctrl_arch_get_configfunction resctrl_arch_get_io_alloc_enabledfunction resctrl_sdciae_set_one_amdfunction _resctrl_sdciae_enablefunction resctrl_arch_io_alloc_enable
Annotated Snippet
if (!msr_param.res) {
msr_param.low = idx;
msr_param.high = msr_param.low + 1;
msr_param.res = r;
msr_param.dom = d;
} else {
msr_param.low = min(msr_param.low, idx);
msr_param.high = max(msr_param.high, idx + 1);
}
}
if (msr_param.res)
smp_call_function_any(&d->hdr.cpu_mask, rdt_ctrl_update, &msr_param, 1);
}
return 0;
}
u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain *d,
u32 closid, enum resctrl_conf_type type)
{
struct rdt_hw_ctrl_domain *hw_dom = resctrl_to_arch_ctrl_dom(d);
u32 idx = resctrl_get_config_index(closid, type);
return hw_dom->ctrl_val[idx];
}
bool resctrl_arch_get_io_alloc_enabled(struct rdt_resource *r)
{
return resctrl_to_arch_res(r)->sdciae_enabled;
}
static void resctrl_sdciae_set_one_amd(void *arg)
{
bool *enable = arg;
if (*enable)
msr_set_bit(MSR_IA32_L3_QOS_EXT_CFG, SDCIAE_ENABLE_BIT);
else
msr_clear_bit(MSR_IA32_L3_QOS_EXT_CFG, SDCIAE_ENABLE_BIT);
}
static void _resctrl_sdciae_enable(struct rdt_resource *r, bool enable)
{
struct rdt_ctrl_domain *d;
/* Walking r->ctrl_domains, ensure it can't race with cpuhp */
lockdep_assert_cpus_held();
/* Update MSR_IA32_L3_QOS_EXT_CFG MSR on all the CPUs in all domains */
list_for_each_entry(d, &r->ctrl_domains, hdr.list)
on_each_cpu_mask(&d->hdr.cpu_mask, resctrl_sdciae_set_one_amd, &enable, 1);
}
int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable)
{
struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
if (hw_res->r_resctrl.cache.io_alloc_capable &&
hw_res->sdciae_enabled != enable) {
_resctrl_sdciae_enable(r, enable);
hw_res->sdciae_enabled = enable;
}
return 0;
}
Annotation
- Immediate include surface: `linux/cpu.h`, `internal.h`.
- Detected declarations: `function Technology`, `function resctrl_arch_update_domains`, `function list_for_each_entry`, `function resctrl_arch_get_config`, `function resctrl_arch_get_io_alloc_enabled`, `function resctrl_sdciae_set_one_amd`, `function _resctrl_sdciae_enable`, `function resctrl_arch_io_alloc_enable`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.