arch/x86/kernel/cpu/sgx/driver.h

File Facts

System

Linux kernel

Corpus path

arch/x86/kernel/cpu/sgx/driver.h

Extension

.h

Size

714 bytes

Lines

29

Domain

Architecture Layer

Bucket

arch/x86

Inferred role

Architecture Layer: operation-table or driver-model contract

Status

pattern implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/kref.h
• linux/mmu_notifier.h
• linux/radix-tree.h
• linux/rwsem.h
• linux/sched.h
• linux/workqueue.h
• uapi/asm/sgx.h
• sgx.h

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

extern const struct file_operations sgx_provision_fops;

long sgx_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);

int sgx_drv_init(void);

#endif /* __ARCH_X86_SGX_DRIVER_H__ */

Annotation

• Immediate include surface: `linux/kref.h`, `linux/mmu_notifier.h`, `linux/radix-tree.h`, `linux/rwsem.h`, `linux/sched.h`, `linux/workqueue.h`, `uapi/asm/sgx.h`, `sgx.h`.
• Atlas domain: Architecture Layer / arch/x86.
• Implementation status: pattern implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.