arch/x86/kernel/cpu/topology_common.c
Source file repositories/reference/linux-study-clean/arch/x86/kernel/cpu/topology_common.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/kernel/cpu/topology_common.c- Extension
.c- Size
- 6692 bytes
- Lines
- 256
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/cpu.hxen/xen.hasm/intel-family.hasm/apic.hasm/processor.hasm/cpuid/api.hasm/smp.hcpu.h
Detected Declarations
function topology_set_domfunction get_topology_cpu_typefunction parse_num_cores_legacyfunction parse_legacyfunction fake_topologyfunction parse_topologyfunction topo_set_idsfunction cpu_parse_topologyfunction cpu_init_topologyexport x86_topo_systemexport __amd_nodes_per_pkg
Annotated Snippet
switch (c->topo.intel_type) {
case INTEL_CPU_TYPE_ATOM: return TOPO_CPU_TYPE_EFFICIENCY;
case INTEL_CPU_TYPE_CORE: return TOPO_CPU_TYPE_PERFORMANCE;
}
}
if (c->x86_vendor == X86_VENDOR_AMD) {
switch (c->topo.amd_type) {
case 0: return TOPO_CPU_TYPE_PERFORMANCE;
case 1: return TOPO_CPU_TYPE_EFFICIENCY;
}
}
return TOPO_CPU_TYPE_UNKNOWN;
}
const char *get_topology_cpu_type_name(struct cpuinfo_x86 *c)
{
switch (get_topology_cpu_type(c)) {
case TOPO_CPU_TYPE_PERFORMANCE:
return "performance";
case TOPO_CPU_TYPE_EFFICIENCY:
return "efficiency";
default:
return "unknown";
}
}
static unsigned int __maybe_unused parse_num_cores_legacy(struct cpuinfo_x86 *c)
{
struct {
u32 cache_type : 5,
unused : 21,
ncores : 6;
} eax;
if (c->cpuid_level < 4)
return 1;
cpuid_subleaf_reg(4, 0, CPUID_EAX, &eax);
if (!eax.cache_type)
return 1;
return eax.ncores + 1;
}
static void parse_legacy(struct topo_scan *tscan)
{
unsigned int cores, core_shift, smt_shift = 0;
struct cpuinfo_x86 *c = tscan->c;
cores = parse_num_cores_legacy(c);
core_shift = get_count_order(cores);
if (cpu_has(c, X86_FEATURE_HT)) {
if (!WARN_ON_ONCE(tscan->ebx1_nproc_shift < core_shift))
smt_shift = tscan->ebx1_nproc_shift - core_shift;
/*
* The parser expects leaf 0xb/0x1f format, which means
* the number of logical processors at core level is
* counting threads.
*/
core_shift += smt_shift;
cores <<= smt_shift;
}
topology_set_dom(tscan, TOPO_SMT_DOMAIN, smt_shift, 1U << smt_shift);
topology_set_dom(tscan, TOPO_CORE_DOMAIN, core_shift, cores);
}
static bool fake_topology(struct topo_scan *tscan)
{
/*
* Preset the CORE level shift for CPUID less systems and XEN_PV,
* which has useless CPUID information.
*/
topology_set_dom(tscan, TOPO_SMT_DOMAIN, 0, 1);
topology_set_dom(tscan, TOPO_CORE_DOMAIN, 0, 1);
return tscan->c->cpuid_level < 1;
}
static void parse_topology(struct topo_scan *tscan, bool early)
{
const struct cpuinfo_topology topo_defaults = {
.cu_id = 0xff,
.llc_id = BAD_APICID,
.l2c_id = BAD_APICID,
.cpu_type = TOPO_CPU_TYPE_UNKNOWN,
};
struct cpuinfo_x86 *c = tscan->c;
Annotation
- Immediate include surface: `linux/cpu.h`, `xen/xen.h`, `asm/intel-family.h`, `asm/apic.h`, `asm/processor.h`, `asm/cpuid/api.h`, `asm/smp.h`, `cpu.h`.
- Detected declarations: `function topology_set_dom`, `function get_topology_cpu_type`, `function parse_num_cores_legacy`, `function parse_legacy`, `function fake_topology`, `function parse_topology`, `function topo_set_ids`, `function cpu_parse_topology`, `function cpu_init_topology`, `export x86_topo_system`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.