arch/x86/kernel/cpu/topology_ext.c

Source file repositories/reference/linux-study-clean/arch/x86/kernel/cpu/topology_ext.c

File Facts

System
Linux kernel
Corpus path
arch/x86/kernel/cpu/topology_ext.c
Extension
.c
Size
4333 bytes
Lines
147
Domain
Architecture Layer
Bucket
arch/x86
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
#include <linux/cpu.h>

#include <asm/apic.h>
#include <asm/cpuid/api.h>
#include <asm/memtype.h>
#include <asm/processor.h>

#include "cpu.h"

enum topo_types {
	INVALID_TYPE		= 0,
	SMT_TYPE		= 1,
	CORE_TYPE		= 2,
	MAX_TYPE_0B		= 3,
	MODULE_TYPE		= 3,
	AMD_CCD_TYPE		= 3,
	TILE_TYPE		= 4,
	AMD_SOCKET_TYPE		= 4,
	MAX_TYPE_80000026	= 5,
	DIE_TYPE		= 5,
	DIEGRP_TYPE		= 6,
	MAX_TYPE_1F		= 7,
};

/*
 * Use a lookup table for the case that there are future types > 6 which
 * describe an intermediate domain level which does not exist today.
 */
static const unsigned int topo_domain_map_0b_1f[MAX_TYPE_1F] = {
	[SMT_TYPE]	= TOPO_SMT_DOMAIN,
	[CORE_TYPE]	= TOPO_CORE_DOMAIN,
	[MODULE_TYPE]	= TOPO_MODULE_DOMAIN,
	[TILE_TYPE]	= TOPO_TILE_DOMAIN,
	[DIE_TYPE]	= TOPO_DIE_DOMAIN,
	[DIEGRP_TYPE]	= TOPO_DIEGRP_DOMAIN,
};

static const unsigned int topo_domain_map_80000026[MAX_TYPE_80000026] = {
	[SMT_TYPE]		= TOPO_SMT_DOMAIN,
	[CORE_TYPE]		= TOPO_CORE_DOMAIN,
	[AMD_CCD_TYPE]		= TOPO_TILE_DOMAIN,
	[AMD_SOCKET_TYPE]	= TOPO_DIE_DOMAIN,
};

static inline bool topo_subleaf(struct topo_scan *tscan, u32 leaf, u32 subleaf,
				unsigned int *last_dom)
{
	unsigned int dom, maxtype;
	const unsigned int *map;
	struct {
		// eax
		u32	x2apic_shift	:  5, // Number of bits to shift APIC ID right
					      // for the topology ID at the next level
					: 27; // Reserved
		// ebx
		u32	num_processors	: 16, // Number of processors at current level
					: 16; // Reserved
		// ecx
		u32	level		:  8, // Current topology level. Same as sub leaf number
			type		:  8, // Level type. If 0, invalid
					: 16; // Reserved
		// edx
		u32	x2apic_id	: 32; // X2APIC ID of the current logical processor
	} sl;

	switch (leaf) {
	case 0x0b: maxtype = MAX_TYPE_0B; map = topo_domain_map_0b_1f; break;
	case 0x1f: maxtype = MAX_TYPE_1F; map = topo_domain_map_0b_1f; break;
	case 0x80000026: maxtype = MAX_TYPE_80000026; map = topo_domain_map_80000026; break;
	default: return false;
	}

	cpuid_read_subleaf(leaf, subleaf, &sl);

	if (!sl.num_processors || sl.type == INVALID_TYPE)
		return false;

	if (sl.type >= maxtype) {
		pr_err_once("Topology: leaf 0x%x:%d Unknown domain type %u\n",
			    leaf, subleaf, sl.type);
		/*
		 * It really would have been too obvious to make the domain
		 * type space sparse and leave a few reserved types between
		 * the points which might change instead of following the
		 * usual "this can be fixed in software" principle.
		 */
		dom = *last_dom + 1;
	} else {
		dom = map[sl.type];

Annotation

Implementation Notes