arch/x86/kernel/irqinit.c
Source file repositories/reference/linux-study-clean/arch/x86/kernel/irqinit.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/kernel/irqinit.c- Extension
.c- Size
- 3148 bytes
- Lines
- 115
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/linkage.hlinux/errno.hlinux/signal.hlinux/sched.hlinux/ioport.hlinux/interrupt.hlinux/irq.hlinux/timex.hlinux/random.hlinux/kprobes.hlinux/init.hlinux/kernel_stat.hlinux/device.hlinux/bitops.hlinux/acpi.hlinux/io.hlinux/delay.hlinux/pgtable.hlinux/atomic.hasm/timer.hasm/hw_irq.hasm/desc.hasm/io_apic.hasm/acpi.hasm/apic.hasm/setup.hasm/i8259.hasm/traps.hasm/fred.hasm/prom.h
Detected Declarations
function init_ISA_irqsfunction init_IRQfunction native_init_IRQ
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
#include <linux/linkage.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/timex.h>
#include <linux/random.h>
#include <linux/kprobes.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/device.h>
#include <linux/bitops.h>
#include <linux/acpi.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/pgtable.h>
#include <linux/atomic.h>
#include <asm/timer.h>
#include <asm/hw_irq.h>
#include <asm/desc.h>
#include <asm/io_apic.h>
#include <asm/acpi.h>
#include <asm/apic.h>
#include <asm/setup.h>
#include <asm/i8259.h>
#include <asm/traps.h>
#include <asm/fred.h>
#include <asm/prom.h>
/*
* ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
* (these are usually mapped to vectors 0x30-0x3f)
*/
/*
* The IO-APIC gives us many more interrupt sources. Most of these
* are unused but an SMP system is supposed to have enough memory ...
* sometimes (mostly wrt. hw bugs) we get corrupted vectors all
* across the spectrum, so we really want to be prepared to get all
* of these. Plus, more powerful systems might have more than 64
* IO-APIC registers.
*
* (these are usually mapped into the 0x30-0xff vector range)
*/
DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
[0 ... NR_VECTORS - 1] = VECTOR_UNUSED,
};
void __init init_ISA_irqs(void)
{
struct irq_chip *chip = legacy_pic->chip;
int i;
/*
* Try to set up the through-local-APIC virtual wire mode earlier.
*
* On some 32-bit UP machines, whose APIC has been disabled by BIOS
* and then got re-enabled by "lapic", it hangs at boot time without this.
*/
init_bsp_APIC();
legacy_pic->init(0);
for (i = 0; i < nr_legacy_irqs(); i++) {
irq_set_chip_and_handler(i, chip, handle_level_irq);
irq_set_status_flags(i, IRQ_LEVEL);
}
}
void __init init_IRQ(void)
{
int i;
/*
* On cpu 0, Assign ISA_IRQ_VECTOR(irq) to IRQ 0..15.
* If these IRQ's are handled by legacy interrupt-controllers like PIC,
* then this configuration will likely be static after the boot. If
* these IRQs are handled by more modern controllers like IO-APIC,
* then this vector space can be freed and re-used dynamically as the
* irq's migrate etc.
*/
for (i = 0; i < nr_legacy_irqs(); i++)
per_cpu(vector_irq, 0)[ISA_IRQ_VECTOR(i)] = irq_to_desc(i);
BUG_ON(irq_init_percpu_irqstack(smp_processor_id()));
Annotation
- Immediate include surface: `linux/linkage.h`, `linux/errno.h`, `linux/signal.h`, `linux/sched.h`, `linux/ioport.h`, `linux/interrupt.h`, `linux/irq.h`, `linux/timex.h`.
- Detected declarations: `function init_ISA_irqs`, `function init_IRQ`, `function native_init_IRQ`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.