arch/x86/kernel/jump_label.c
Source file repositories/reference/linux-study-clean/arch/x86/kernel/jump_label.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/kernel/jump_label.c- Extension
.c- Size
- 3672 bytes
- Lines
- 149
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/jump_label.hlinux/memory.hlinux/uaccess.hlinux/module.hlinux/list.hlinux/jhash.hlinux/cpu.hasm/kprobes.hasm/alternative.hasm/text-patching.hasm/insn.h
Detected Declarations
struct jump_label_patchfunction Copyrightfunction __jump_label_patchfunction __jump_label_transformfunction jump_label_transformfunction arch_jump_label_transformfunction arch_jump_label_transform_queuefunction arch_jump_label_transform_apply
Annotated Snippet
struct jump_label_patch {
const void *code;
int size;
};
static struct jump_label_patch
__jump_label_patch(struct jump_entry *entry, enum jump_label_type type)
{
const void *expect, *code, *nop;
const void *addr, *dest;
int size;
addr = (void *)jump_entry_code(entry);
dest = (void *)jump_entry_target(entry);
size = arch_jump_entry_size(entry);
switch (size) {
case JMP8_INSN_SIZE:
code = text_gen_insn(JMP8_INSN_OPCODE, addr, dest);
nop = x86_nops[size];
break;
case JMP32_INSN_SIZE:
code = text_gen_insn(JMP32_INSN_OPCODE, addr, dest);
nop = x86_nops[size];
break;
default: BUG();
}
if (type == JUMP_LABEL_JMP)
expect = nop;
else
expect = code;
if (memcmp(addr, expect, size)) {
/*
* The location is not an op that we were expecting.
* Something went wrong. Crash the box, as something could be
* corrupting the kernel.
*/
pr_crit("jump_label: Fatal kernel bug, unexpected op at %pS [%p] (%5ph != %5ph)) size:%d type:%d\n",
addr, addr, addr, expect, size, type);
BUG();
}
if (type == JUMP_LABEL_NOP)
code = nop;
return (struct jump_label_patch){.code = code, .size = size};
}
static __always_inline void
__jump_label_transform(struct jump_entry *entry,
enum jump_label_type type,
int init)
{
const struct jump_label_patch jlp = __jump_label_patch(entry, type);
/*
* As long as only a single processor is running and the code is still
* not marked as RO, text_poke_early() can be used; Checking that
* system_state is SYSTEM_BOOTING guarantees it. It will be set to
* SYSTEM_SCHEDULING before other cores are awaken and before the
* code is write-protected.
*
* At the time the change is being done, just ignore whether we
* are doing nop -> jump or jump -> nop transition, and assume
* always nop being the 'currently valid' instruction
*/
if (init || system_state == SYSTEM_BOOTING) {
text_poke_early((void *)jump_entry_code(entry), jlp.code, jlp.size);
return;
}
smp_text_poke_single((void *)jump_entry_code(entry), jlp.code, jlp.size, NULL);
}
static void __ref jump_label_transform(struct jump_entry *entry,
enum jump_label_type type,
int init)
{
mutex_lock(&text_mutex);
__jump_label_transform(entry, type, init);
mutex_unlock(&text_mutex);
}
void arch_jump_label_transform(struct jump_entry *entry,
enum jump_label_type type)
{
Annotation
- Immediate include surface: `linux/jump_label.h`, `linux/memory.h`, `linux/uaccess.h`, `linux/module.h`, `linux/list.h`, `linux/jhash.h`, `linux/cpu.h`, `asm/kprobes.h`.
- Detected declarations: `struct jump_label_patch`, `function Copyright`, `function __jump_label_patch`, `function __jump_label_transform`, `function jump_label_transform`, `function arch_jump_label_transform`, `function arch_jump_label_transform_queue`, `function arch_jump_label_transform_apply`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.