arch/x86/kernel/verify_cpu.S
Source file repositories/reference/linux-study-clean/arch/x86/kernel/verify_cpu.S
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/kernel/verify_cpu.S- Extension
.S- Size
- 3879 bytes
- Lines
- 145
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: arch/x86
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/cpufeatures.hasm/cpufeaturemasks.hasm/msr-index.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include <asm/cpufeatures.h>
#include <asm/cpufeaturemasks.h>
#include <asm/msr-index.h>
#define SSE_MASK \
(REQUIRED_MASK0 & ((1<<(X86_FEATURE_XMM & 31)) | (1<<(X86_FEATURE_XMM2 & 31))))
SYM_FUNC_START_LOCAL(verify_cpu)
pushf # Save caller passed flags
push $0 # Kill any dangerous flags
popf
#ifndef __x86_64__
pushfl # standard way to check for cpuid
popl %eax
movl %eax,%ebx
xorl $0x200000,%eax
pushl %eax
popfl
pushfl
popl %eax
cmpl %eax,%ebx
jz .Lverify_cpu_no_longmode # cpu has no cpuid
#endif
movl $0x0,%eax # See if cpuid 1 is implemented
cpuid
cmpl $0x1,%eax
jb .Lverify_cpu_no_longmode # no cpuid 1
xor %di,%di
cmpl $0x68747541,%ebx # AuthenticAMD
jnz .Lverify_cpu_noamd
cmpl $0x69746e65,%edx
jnz .Lverify_cpu_noamd
cmpl $0x444d4163,%ecx
jnz .Lverify_cpu_noamd
mov $1,%di # cpu is from AMD
jmp .Lverify_cpu_check
.Lverify_cpu_noamd:
cmpl $0x756e6547,%ebx # GenuineIntel?
jnz .Lverify_cpu_check
cmpl $0x49656e69,%edx
jnz .Lverify_cpu_check
cmpl $0x6c65746e,%ecx
jnz .Lverify_cpu_check
# only call IA32_MISC_ENABLE when:
# family > 6 || (family == 6 && model >= 0xd)
movl $0x1, %eax # check CPU family and model
cpuid
movl %eax, %ecx
andl $0x0ff00f00, %eax # mask family and extended family
shrl $8, %eax
cmpl $6, %eax
ja .Lverify_cpu_clear_xd # family > 6, ok
jb .Lverify_cpu_check # family < 6, skip
andl $0x000f00f0, %ecx # mask model and extended model
shrl $4, %ecx
cmpl $0xd, %ecx
jb .Lverify_cpu_check # family == 6, model < 0xd, skip
.Lverify_cpu_clear_xd:
movl $MSR_IA32_MISC_ENABLE, %ecx
rdmsr
btrl $2, %edx # clear MSR_IA32_MISC_ENABLE_XD_DISABLE
jnc .Lverify_cpu_check # only write MSR if bit was changed
Annotation
- Immediate include surface: `asm/cpufeatures.h`, `asm/cpufeaturemasks.h`, `asm/msr-index.h`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.