arch/x86/kvm/vmx/tdx_arch.h

Source file repositories/reference/linux-study-clean/arch/x86/kvm/vmx/tdx_arch.h

File Facts

System
Linux kernel
Corpus path
arch/x86/kvm/vmx/tdx_arch.h
Extension
.h
Size
4414 bytes
Lines
162
Domain
Architecture Layer
Bucket
arch/x86
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

struct tdx_cpuid_value {
	u32 eax;
	u32 ebx;
	u32 ecx;
	u32 edx;
} __packed;

#define TDX_EXT_EXIT_QUAL_TYPE_MASK	GENMASK(3, 0)
#define TDX_EXT_EXIT_QUAL_TYPE_PENDING_EPT_VIOLATION  6
/*
 * TD_PARAMS is provided as an input to TDH_MNG_INIT, the size of which is 1024B.
 */
struct td_params {
	u64 attributes;
	u64 xfam;
	u16 max_vcpus;
	u8 reserved0[6];

	u64 eptp_controls;
	u64 config_flags;
	u16 tsc_frequency;
	u8  reserved1[38];

	u64 mrconfigid[6];
	u64 mrowner[6];
	u64 mrownerconfig[6];
	u64 reserved2[4];

	union {
		DECLARE_FLEX_ARRAY(struct tdx_cpuid_value, cpuid_values);
		u8 reserved3[768];
	};
} __packed __aligned(1024);

/*
 * Guest uses MAX_PA for GPAW when set.
 * 0: GPA.SHARED bit is GPA[47]
 * 1: GPA.SHARED bit is GPA[51]
 */
#define TDX_CONFIG_FLAGS_MAX_GPAW      BIT_ULL(0)

/*
 * TDH.VP.ENTER, TDG.VP.VMCALL preserves RBP
 * 0: RBP can be used for TDG.VP.VMCALL input. RBP is clobbered.
 * 1: RBP can't be used for TDG.VP.VMCALL input. RBP is preserved.
 */
#define TDX_CONFIG_FLAGS_NO_RBP_MOD	BIT_ULL(2)


/*
 * TDX requires the frequency to be defined in units of 25MHz, which is the
 * frequency of the core crystal clock on TDX-capable platforms, i.e. the TDX
 * module can only program frequencies that are multiples of 25MHz.  The
 * frequency must be between 100mhz and 10ghz (inclusive).
 */
#define TDX_TSC_KHZ_TO_25MHZ(tsc_in_khz)	((tsc_in_khz) / (25 * 1000))
#define TDX_TSC_25MHZ_TO_KHZ(tsc_in_25mhz)	((tsc_in_25mhz) * (25 * 1000))
#define TDX_MIN_TSC_FREQUENCY_KHZ		(100 * 1000)
#define TDX_MAX_TSC_FREQUENCY_KHZ		(10 * 1000 * 1000)

/* Additional Secure EPT entry information */
#define TDX_SEPT_LEVEL_MASK		GENMASK_ULL(2, 0)
#define TDX_SEPT_STATE_MASK		GENMASK_ULL(15, 8)
#define TDX_SEPT_STATE_SHIFT		8

enum tdx_sept_entry_state {
	TDX_SEPT_FREE = 0,
	TDX_SEPT_BLOCKED = 1,
	TDX_SEPT_PENDING = 2,
	TDX_SEPT_PENDING_BLOCKED = 3,
	TDX_SEPT_PRESENT = 4,
};

static inline u8 tdx_get_sept_level(u64 sept_entry_info)
{
	return sept_entry_info & TDX_SEPT_LEVEL_MASK;
}

static inline u8 tdx_get_sept_state(u64 sept_entry_info)
{
	return (sept_entry_info & TDX_SEPT_STATE_MASK) >> TDX_SEPT_STATE_SHIFT;
}

#define MD_FIELD_ID_FEATURES0_TOPOLOGY_ENUM	BIT_ULL(20)

/*
 * TD scope metadata field ID.
 */
#define TD_MD_FIELD_ID_CPUID_VALUES		0x9410000300000000ULL

Annotation

Implementation Notes