arch/x86/lib/copy_page_64.S
Source file repositories/reference/linux-study-clean/arch/x86/lib/copy_page_64.S
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/lib/copy_page_64.S- Extension
.S- Size
- 1904 bytes
- Lines
- 91
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
Dependency Surface
linux/export.hlinux/linkage.hlinux/cfi_types.hasm/cpufeatures.hasm/alternative.h
Detected Declarations
export copy_page
Annotated Snippet
#include <linux/export.h>
#include <linux/linkage.h>
#include <linux/cfi_types.h>
#include <asm/cpufeatures.h>
#include <asm/alternative.h>
/*
* Some CPUs run faster using the string copy instructions (sane microcode).
* It is also a lot simpler. Use this when possible. But, don't use streaming
* copy unless the CPU indicates X86_FEATURE_REP_GOOD. Could vary the
* prefetch distance based on SMP/UP.
*/
ALIGN
SYM_TYPED_FUNC_START(copy_page)
ALTERNATIVE "jmp copy_page_regs", "", X86_FEATURE_REP_GOOD
movl $4096/8, %ecx
rep movsq
RET
SYM_FUNC_END(copy_page)
EXPORT_SYMBOL(copy_page)
SYM_FUNC_START_LOCAL(copy_page_regs)
subq $2*8, %rsp
movq %rbx, (%rsp)
movq %r12, 1*8(%rsp)
movl $(4096/64)-5, %ecx
.p2align 4
.Loop64:
dec %rcx
movq 0x8*0(%rsi), %rax
movq 0x8*1(%rsi), %rbx
movq 0x8*2(%rsi), %rdx
movq 0x8*3(%rsi), %r8
movq 0x8*4(%rsi), %r9
movq 0x8*5(%rsi), %r10
movq 0x8*6(%rsi), %r11
movq 0x8*7(%rsi), %r12
prefetcht0 5*64(%rsi)
movq %rax, 0x8*0(%rdi)
movq %rbx, 0x8*1(%rdi)
movq %rdx, 0x8*2(%rdi)
movq %r8, 0x8*3(%rdi)
movq %r9, 0x8*4(%rdi)
movq %r10, 0x8*5(%rdi)
movq %r11, 0x8*6(%rdi)
movq %r12, 0x8*7(%rdi)
leaq 64 (%rsi), %rsi
leaq 64 (%rdi), %rdi
jnz .Loop64
movl $5, %ecx
.p2align 4
.Loop2:
decl %ecx
movq 0x8*0(%rsi), %rax
movq 0x8*1(%rsi), %rbx
movq 0x8*2(%rsi), %rdx
movq 0x8*3(%rsi), %r8
movq 0x8*4(%rsi), %r9
movq 0x8*5(%rsi), %r10
movq 0x8*6(%rsi), %r11
movq 0x8*7(%rsi), %r12
movq %rax, 0x8*0(%rdi)
Annotation
- Immediate include surface: `linux/export.h`, `linux/linkage.h`, `linux/cfi_types.h`, `asm/cpufeatures.h`, `asm/alternative.h`.
- Detected declarations: `export copy_page`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.