arch/x86/pci/ce4100.c

Source file repositories/reference/linux-study-clean/arch/x86/pci/ce4100.c

File Facts

System
Linux kernel
Corpus path
arch/x86/pci/ce4100.c
Extension
.c
Size
9489 bytes
Lines
319
Domain
Architecture Layer
Bucket
arch/x86
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

struct sim_reg {
	u32 value;
	u32 mask;
};

struct sim_dev_reg {
	int dev_func;
	int reg;
	void (*init)(struct sim_dev_reg *reg);
	void (*read)(struct sim_dev_reg *reg, u32 *value);
	void (*write)(struct sim_dev_reg *reg, u32 value);
	struct sim_reg sim_reg;
};

#define MB (1024 * 1024)
#define KB (1024)
#define SIZE_TO_MASK(size) (~(size - 1))

#define DEFINE_REG(device, func, offset, size, init_op, read_op, write_op)\
{ PCI_DEVFN(device, func), offset, init_op, read_op, write_op,\
	{0, SIZE_TO_MASK(size)} },

/*
 * All read/write functions are called with pci_config_lock held.
 */
static void reg_init(struct sim_dev_reg *reg)
{
	pci_direct_conf1.read(0, 1, reg->dev_func, reg->reg, 4,
			      &reg->sim_reg.value);
}

static void reg_read(struct sim_dev_reg *reg, u32 *value)
{
	*value = reg->sim_reg.value;
}

static void reg_write(struct sim_dev_reg *reg, u32 value)
{
	reg->sim_reg.value = (value & reg->sim_reg.mask) |
		(reg->sim_reg.value & ~reg->sim_reg.mask);
}

static void sata_reg_init(struct sim_dev_reg *reg)
{
	pci_direct_conf1.read(0, 1, PCI_DEVFN(14, 0), 0x10, 4,
			      &reg->sim_reg.value);
	reg->sim_reg.value += 0x400;
}

static void ehci_reg_read(struct sim_dev_reg *reg, u32 *value)
{
	reg_read(reg, value);
	if (*value != reg->sim_reg.mask)
		*value |= 0x100;
}

static void sata_revid_init(struct sim_dev_reg *reg)
{
	reg->sim_reg.value = 0x01060100;
	reg->sim_reg.mask = 0;
}

static void sata_revid_read(struct sim_dev_reg *reg, u32 *value)
{
	reg_read(reg, value);
}

static void reg_noirq_read(struct sim_dev_reg *reg, u32 *value)
{
	/* force interrupt pin value to 0 */
	*value = reg->sim_reg.value & 0xfff00ff;
}

static struct sim_dev_reg bus1_fixups[] = {
	DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write)
	DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write)
	DEFINE_REG(2, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
	DEFINE_REG(3, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
	DEFINE_REG(4, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
	DEFINE_REG(4, 1, 0x10, (128*KB), reg_init, reg_read, reg_write)
	DEFINE_REG(6, 0, 0x10, (512*KB), reg_init, reg_read, reg_write)
	DEFINE_REG(6, 1, 0x10, (512*KB), reg_init, reg_read, reg_write)
	DEFINE_REG(6, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
	DEFINE_REG(8, 0, 0x10, (1*MB), reg_init, reg_read, reg_write)
	DEFINE_REG(8, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
	DEFINE_REG(8, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
	DEFINE_REG(9, 0, 0x10 , (1*MB), reg_init, reg_read, reg_write)
	DEFINE_REG(9, 0, 0x14, (64*KB), reg_init, reg_read, reg_write)
	DEFINE_REG(10, 0, 0x10, (256), reg_init, reg_read, reg_write)
	DEFINE_REG(10, 0, 0x14, (256*MB), reg_init, reg_read, reg_write)

Annotation

Implementation Notes