arch/x86/pci/common.c
Source file repositories/reference/linux-study-clean/arch/x86/pci/common.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/pci/common.c- Extension
.c- Size
- 17779 bytes
- Lines
- 735
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/sched.hlinux/pci.hlinux/pci-acpi.hlinux/ioport.hlinux/init.hlinux/dmi.hlinux/slab.hasm/acpi.hasm/segment.hasm/io.hasm/smp.hasm/pci_x86.hasm/setup.hasm/irqdomain.h
Detected Declarations
function raw_pci_readfunction raw_pci_writefunction pci_readfunction pci_writefunction can_skip_ioresource_alignfunction dmi_check_skip_isa_alignfunction pcibios_fixup_device_resourcesfunction pcibios_fixup_busfunction pcibios_add_busfunction pcibios_remove_busfunction linefunction read_dmi_type_b1function find_sort_methodfunction assign_all_bussesfunction set_scan_allfunction dmi_check_pciprobefunction pcibios_scan_rootfunction pcibios_set_cache_line_sizefunction pcibios_initfunction pcibios_setupfunction pcibios_assign_all_bussesfunction set_dev_domain_optionsfunction pcibios_device_addfunction pcibios_enable_devicefunction pcibios_disable_devicefunction pcibios_release_devicefunction pci_ext_cfg_avail
Annotated Snippet
if (bar_r->start == 0 && bar_r->end != 0) {
bar_r->flags = 0;
bar_r->end = 0;
}
}
}
if (pci_probe & PCI_NOASSIGN_ROMS) {
if (rom_r->parent)
return;
if (rom_r->start) {
/* we deal with BIOS assigned ROM later */
return;
}
rom_r->start = rom_r->end = rom_r->flags = 0;
}
}
/*
* Called after each bus is probed, but before its children
* are examined.
*/
void pcibios_fixup_bus(struct pci_bus *b)
{
struct pci_dev *dev;
pci_read_bridge_bases(b);
list_for_each_entry(dev, &b->devices, bus_list)
pcibios_fixup_device_resources(dev);
}
void pcibios_add_bus(struct pci_bus *bus)
{
acpi_pci_add_bus(bus);
}
void pcibios_remove_bus(struct pci_bus *bus)
{
acpi_pci_remove_bus(bus);
}
/*
* Only use DMI information to set this if nothing was passed
* on the kernel command line (which was parsed earlier).
*/
static int __init set_bf_sort(const struct dmi_system_id *d)
{
if (pci_bf_sort == pci_bf_sort_default) {
pci_bf_sort = pci_dmi_bf;
printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
}
return 0;
}
static void __init read_dmi_type_b1(const struct dmi_header *dm,
void *private_data)
{
u8 *data = (u8 *)dm + 4;
if (dm->type != 0xB1)
return;
if ((((*(u32 *)data) >> 9) & 0x03) == 0x01)
set_bf_sort((const struct dmi_system_id *)private_data);
}
static int __init find_sort_method(const struct dmi_system_id *d)
{
dmi_walk(read_dmi_type_b1, (void *)d);
return 0;
}
/*
* Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
*/
#ifdef __i386__
static int __init assign_all_busses(const struct dmi_system_id *d)
{
pci_probe |= PCI_ASSIGN_ALL_BUSSES;
printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
" (pci=assign-busses)\n", d->ident);
return 0;
}
#endif
static int __init set_scan_all(const struct dmi_system_id *d)
{
printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n",
d->ident);
Annotation
- Immediate include surface: `linux/sched.h`, `linux/pci.h`, `linux/pci-acpi.h`, `linux/ioport.h`, `linux/init.h`, `linux/dmi.h`, `linux/slab.h`, `asm/acpi.h`.
- Detected declarations: `function raw_pci_read`, `function raw_pci_write`, `function pci_read`, `function pci_write`, `function can_skip_ioresource_align`, `function dmi_check_skip_isa_align`, `function pcibios_fixup_device_resources`, `function pcibios_fixup_bus`, `function pcibios_add_bus`, `function pcibios_remove_bus`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.