arch/x86/pci/mmconfig_32.c
Source file repositories/reference/linux-study-clean/arch/x86/pci/mmconfig_32.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/pci/mmconfig_32.c- Extension
.c- Size
- 3446 bytes
- Lines
- 157
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/pci.hlinux/init.hlinux/rcupdate.hasm/e820/api.hasm/pci_x86.h
Detected Declarations
function get_base_addrfunction pci_exp_set_dev_basefunction pci_mmcfg_readfunction pci_mmcfg_writefunction pci_mmcfg_arch_initfunction pci_mmcfg_arch_freefunction pci_mmcfg_arch_unmap
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2004 Matthew Wilcox <matthew@wil.cx>
* Copyright (C) 2004 Intel Corp.
*/
/*
* mmconfig.c - Low-level direct PCI config space access via MMCONFIG
*/
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/rcupdate.h>
#include <asm/e820/api.h>
#include <asm/pci_x86.h>
/* Assume systems with more busses have correct MCFG */
#define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))
/* The base address of the last MMCONFIG device accessed */
static u32 mmcfg_last_accessed_device;
static int mmcfg_last_accessed_cpu;
/*
* Functions for accessing PCI configuration space with MMCONFIG accesses
*/
static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
{
struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus);
if (cfg)
return cfg->address;
return 0;
}
/*
* This is always called under pci_config_lock
*/
static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
{
u32 dev_base = base | PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12);
int cpu = smp_processor_id();
if (dev_base != mmcfg_last_accessed_device ||
cpu != mmcfg_last_accessed_cpu) {
mmcfg_last_accessed_device = dev_base;
mmcfg_last_accessed_cpu = cpu;
set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
}
}
static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 *value)
{
unsigned long flags;
u32 base;
if ((bus > 255) || (devfn > 255) || (reg > 4095)) {
err: *value = -1;
return -EINVAL;
}
rcu_read_lock();
base = get_base_addr(seg, bus, devfn);
if (!base) {
rcu_read_unlock();
goto err;
}
raw_spin_lock_irqsave(&pci_config_lock, flags);
pci_exp_set_dev_base(base, bus, devfn);
switch (len) {
case 1:
*value = mmio_config_readb(mmcfg_virt_addr + reg);
break;
case 2:
*value = mmio_config_readw(mmcfg_virt_addr + reg);
break;
case 4:
*value = mmio_config_readl(mmcfg_virt_addr + reg);
break;
}
raw_spin_unlock_irqrestore(&pci_config_lock, flags);
rcu_read_unlock();
return 0;
}
static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
Annotation
- Immediate include surface: `linux/pci.h`, `linux/init.h`, `linux/rcupdate.h`, `asm/e820/api.h`, `asm/pci_x86.h`.
- Detected declarations: `function get_base_addr`, `function pci_exp_set_dev_base`, `function pci_mmcfg_read`, `function pci_mmcfg_write`, `function pci_mmcfg_arch_init`, `function pci_mmcfg_arch_free`, `function pci_mmcfg_arch_unmap`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.