arch/x86/platform/intel-mid/pwr.c
Source file repositories/reference/linux-study-clean/arch/x86/platform/intel-mid/pwr.c
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/platform/intel-mid/pwr.c- Extension
.c- Size
- 11408 bytes
- Lines
- 486
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/errno.hlinux/interrupt.hlinux/kernel.hlinux/export.hlinux/mutex.hlinux/pci.hasm/intel-mid.h
Detected Declarations
struct mid_pwr_devstruct mid_pwrstruct mid_pwr_device_infofunction mid_pwr_get_statefunction mid_pwr_set_statefunction mid_pwr_set_wakefunction mid_pwr_interrupt_disablefunction mid_pwr_is_busyfunction mid_pwr_waitfunction mid_pwr_wait_for_cmdfunction __update_power_statefunction __find_weakest_power_statefunction __set_power_statefunction mid_pwr_set_power_statefunction intel_mid_pci_set_power_statefunction intel_mid_pci_get_power_statefunction intel_mid_pwr_power_offfunction intel_mid_pwr_get_lss_idfunction mid_pwr_irq_handlerfunction mid_pwr_probefunction mid_set_initial_statefunction pnw_set_initial_statefunction tng_set_initial_state
Annotated Snippet
static struct pci_driver mid_pwr_pci_driver = {
.name = "intel_mid_pwr",
.probe = mid_pwr_probe,
.id_table = mid_pwr_pci_ids,
};
builtin_pci_driver(mid_pwr_pci_driver);
Annotation
- Immediate include surface: `linux/delay.h`, `linux/errno.h`, `linux/interrupt.h`, `linux/kernel.h`, `linux/export.h`, `linux/mutex.h`, `linux/pci.h`, `asm/intel-mid.h`.
- Detected declarations: `struct mid_pwr_dev`, `struct mid_pwr`, `struct mid_pwr_device_info`, `function mid_pwr_get_state`, `function mid_pwr_set_state`, `function mid_pwr_set_wake`, `function mid_pwr_interrupt_disable`, `function mid_pwr_is_busy`, `function mid_pwr_wait`, `function mid_pwr_wait_for_cmd`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.