arch/x86/um/asm/processor.h
Source file repositories/reference/linux-study-clean/arch/x86/um/asm/processor.h
File Facts
- System
- Linux kernel
- Corpus path
arch/x86/um/asm/processor.h- Extension
.h- Size
- 995 bytes
- Lines
- 44
- Domain
- Architecture Layer
- Bucket
- arch/x86
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/time-internal.hsysdep/faultinfo.hprocessor_32.hprocessor_64.hasm/user.hasm/processor-generic.h
Detected Declarations
function native_pausefunction cpu_relax
Annotated Snippet
#ifndef __UM_PROCESSOR_H
#define __UM_PROCESSOR_H
#include <linux/time-internal.h>
/* include faultinfo structure */
#include <sysdep/faultinfo.h>
#ifdef CONFIG_X86_32
# include "processor_32.h"
#else
# include "processor_64.h"
#endif
#define KSTK_EIP(tsk) KSTK_REG(tsk, HOST_IP)
#define KSTK_ESP(tsk) KSTK_REG(tsk, HOST_SP)
#define KSTK_EBP(tsk) KSTK_REG(tsk, HOST_BP)
#define ARCH_IS_STACKGROW(address) \
(address + 65536 + 32 * sizeof(unsigned long) >= UPT_SP(¤t->thread.regs.regs))
#include <asm/user.h>
/* PAUSE is a good thing to insert into busy-wait loops. */
static __always_inline void native_pause(void)
{
__asm__ __volatile__("pause": : :"memory");
}
static __always_inline void cpu_relax(void)
{
if (time_travel_mode == TT_MODE_INFCPU ||
time_travel_mode == TT_MODE_EXTERNAL)
time_travel_ndelay(1);
else
native_pause();
}
#define task_pt_regs(t) (&(t)->thread.regs)
#include <asm/processor-generic.h>
#endif
Annotation
- Immediate include surface: `linux/time-internal.h`, `sysdep/faultinfo.h`, `processor_32.h`, `processor_64.h`, `asm/user.h`, `asm/processor-generic.h`.
- Detected declarations: `function native_pause`, `function cpu_relax`.
- Atlas domain: Architecture Layer / arch/x86.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.