arch/xtensa/include/asm/bitops.h
Source file repositories/reference/linux-study-clean/arch/xtensa/include/asm/bitops.h
File Facts
- System
- Linux kernel
- Corpus path
arch/xtensa/include/asm/bitops.h- Extension
.h- Size
- 5538 bytes
- Lines
- 219
- Domain
- Architecture Layer
- Bucket
- arch/xtensa
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/processor.hasm/byteorder.hasm/barrier.hasm-generic/bitops/non-atomic.hasm-generic/bitops/ffs.hasm-generic/bitops/__ffs.hasm-generic/bitops/ffz.hasm-generic/bitops/fls.hasm-generic/bitops/__fls.hasm-generic/bitops/fls64.hasm-generic/bitops/atomic.hasm-generic/bitops/instrumented-atomic.hasm-generic/bitops/le.hasm-generic/bitops/ext2-atomic-setbit.hasm-generic/bitops/hweight.hasm-generic/bitops/lock.hasm-generic/bitops/sched.h
Detected Declarations
function Copyrightfunction ffzfunction __ffsfunction ffzfunction flsfunction __fls
Annotated Snippet
#ifndef _XTENSA_BITOPS_H
#define _XTENSA_BITOPS_H
#ifndef _LINUX_BITOPS_H
#error only <linux/bitops.h> can be included directly
#endif
#include <asm/processor.h>
#include <asm/byteorder.h>
#include <asm/barrier.h>
#include <asm-generic/bitops/non-atomic.h>
#if XCHAL_HAVE_NSA
static inline unsigned long __cntlz (unsigned long x)
{
int lz;
asm ("nsau %0, %1" : "=r" (lz) : "r" (x));
return lz;
}
/*
* ffz: Find first zero in word. Undefined if no zero exists.
* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
*/
static inline int __attribute_const__ ffz(unsigned long x)
{
return 31 - __cntlz(~x & -~x);
}
/*
* __ffs: Find first bit set in word. Return 0 for bit 0
*/
static inline __attribute_const__ unsigned long __ffs(unsigned long x)
{
return 31 - __cntlz(x & -x);
}
/*
* ffs: Find first bit set in word. This is defined the same way as
* the libc and compiler builtin ffs routines, therefore
* differs in spirit from the above ffz (man ffs).
*/
static inline __attribute_const__ int ffs(unsigned long x)
{
return 32 - __cntlz(x & -x);
}
/*
* fls: Find last (most-significant) bit set in word.
* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
*/
static inline __attribute_const__ int fls (unsigned int x)
{
return 32 - __cntlz(x);
}
/**
* __fls - find last (most-significant) set bit in a long word
* @word: the word to search
*
* Undefined if no set bit exists, so code should check against 0 first.
*/
static inline __attribute_const__ unsigned long __fls(unsigned long word)
{
return 31 - __cntlz(word);
}
#else
/* Use the generic implementation if we don't have the nsa/nsau instructions. */
# include <asm-generic/bitops/ffs.h>
# include <asm-generic/bitops/__ffs.h>
# include <asm-generic/bitops/ffz.h>
# include <asm-generic/bitops/fls.h>
# include <asm-generic/bitops/__fls.h>
#endif
#include <asm-generic/bitops/fls64.h>
#if XCHAL_HAVE_EXCLUSIVE
#define BIT_OP(op, insn, inv) \
static inline void arch_##op##_bit(unsigned int bit, volatile unsigned long *p)\
Annotation
- Immediate include surface: `asm/processor.h`, `asm/byteorder.h`, `asm/barrier.h`, `asm-generic/bitops/non-atomic.h`, `asm-generic/bitops/ffs.h`, `asm-generic/bitops/__ffs.h`, `asm-generic/bitops/ffz.h`, `asm-generic/bitops/fls.h`.
- Detected declarations: `function Copyright`, `function ffz`, `function __ffs`, `function ffz`, `function fls`, `function __fls`.
- Atlas domain: Architecture Layer / arch/xtensa.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.