arch/xtensa/include/asm/tlb.h

File Facts

System

Linux kernel

Corpus path

arch/xtensa/include/asm/tlb.h

Extension

.h

Size

505 bytes

Lines

24

Domain

Architecture Layer

Bucket

arch/xtensa

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• asm/cache.h
• asm/page.h
• asm-generic/tlb.h

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _XTENSA_TLB_H
#define _XTENSA_TLB_H

#include <asm/cache.h>
#include <asm/page.h>

#include <asm-generic/tlb.h>

#define __pte_free_tlb(tlb, pte, address)	pte_free((tlb)->mm, pte)

void check_tlb_sanity(void);

#endif	/* _XTENSA_TLB_H */

Annotation

• Immediate include surface: `asm/cache.h`, `asm/page.h`, `asm-generic/tlb.h`.
• Atlas domain: Architecture Layer / arch/xtensa.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.