arch/xtensa/kernel/pci-dma.c

Source file repositories/reference/linux-study-clean/arch/xtensa/kernel/pci-dma.c

File Facts

System
Linux kernel
Corpus path
arch/xtensa/kernel/pci-dma.c
Extension
.c
Size
2173 bytes
Lines
99
Domain
Architecture Layer
Bucket
arch/xtensa
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

while (size > 0) {
			size_t sz = min_t(size_t, size, PAGE_SIZE - off);
			void *vaddr = kmap_atomic(page);

			fn((unsigned long)vaddr + off, sz);
			kunmap_atomic(vaddr);
			off = 0;
			++page;
			size -= sz;
		}
}

void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
		enum dma_data_direction dir)
{
	switch (dir) {
	case DMA_BIDIRECTIONAL:
	case DMA_FROM_DEVICE:
		do_cache_op(paddr, size, __invalidate_dcache_range);
		break;

	case DMA_NONE:
		BUG();
		break;

	default:
		break;
	}
}

void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
		enum dma_data_direction dir)
{
	switch (dir) {
	case DMA_BIDIRECTIONAL:
	case DMA_TO_DEVICE:
		if (XCHAL_DCACHE_IS_WRITEBACK)
			do_cache_op(paddr, size, __flush_dcache_range);
		break;

	case DMA_NONE:
		BUG();
		break;

	default:
		break;
	}
}

void arch_dma_prep_coherent(struct page *page, size_t size)
{
	__invalidate_dcache_range((unsigned long)page_address(page), size);
}

/*
 * Memory caching is platform-dependent in noMMU xtensa configurations.
 * This function should be implemented in platform code in order to enable
 * coherent DMA memory operations when CONFIG_MMU is not enabled.
 */
#ifdef CONFIG_MMU
void *arch_dma_set_uncached(void *p, size_t size)
{
	return p + XCHAL_KSEG_BYPASS_VADDR - XCHAL_KSEG_CACHED_VADDR;
}
#endif /* CONFIG_MMU */

Annotation

Implementation Notes