arch/xtensa/lib/usercopy.S
Source file repositories/reference/linux-study-clean/arch/xtensa/lib/usercopy.S
File Facts
- System
- Linux kernel
- Corpus path
arch/xtensa/lib/usercopy.S- Extension
.S- Size
- 7553 bytes
- Lines
- 302
- Domain
- Architecture Layer
- Bucket
- arch/xtensa
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
Dependency Surface
linux/linkage.hasm/asmmacro.hasm/core.h
Detected Declarations
export __xtensa_copy_user
Annotated Snippet
#include <linux/linkage.h>
#include <asm/asmmacro.h>
#include <asm/core.h>
.text
ENTRY(__xtensa_copy_user)
#if !XCHAL_HAVE_LOOPS && defined(__XTENSA_CALL0_ABI__)
#define STACK_SIZE 4
#else
#define STACK_SIZE 0
#endif
abi_entry(STACK_SIZE)
# a2/ dst, a3/ src, a4/ len
mov a5, a2 # copy dst so that a2 is return value
mov a11, a4 # preserve original len for error case
.Lcommon:
bbsi.l a2, 0, .Ldst1mod2 # if dst is 1 mod 2
bbsi.l a2, 1, .Ldst2mod4 # if dst is 2 mod 4
.Ldstaligned: # return here from .Ldstunaligned when dst is aligned
srli a7, a4, 4 # number of loop iterations with 16B
# per iteration
movi a8, 3 # if source is also aligned,
bnone a3, a8, .Laligned # then use word copy
__ssa8 a3 # set shift amount from byte offset
bnez a4, .Lsrcunaligned
movi a2, 0 # return success for len==0
abi_ret(STACK_SIZE)
/*
* Destination is unaligned
*/
.Ldst1mod2: # dst is only byte aligned
bltui a4, 7, .Lbytecopy # do short copies byte by byte
# copy 1 byte
EX(10f) l8ui a6, a3, 0
addi a3, a3, 1
EX(10f) s8i a6, a5, 0
addi a5, a5, 1
addi a4, a4, -1
bbci.l a5, 1, .Ldstaligned # if dst is now aligned, then
# return to main algorithm
.Ldst2mod4: # dst 16-bit aligned
# copy 2 bytes
bltui a4, 6, .Lbytecopy # do short copies byte by byte
EX(10f) l8ui a6, a3, 0
EX(10f) l8ui a7, a3, 1
addi a3, a3, 2
EX(10f) s8i a6, a5, 0
EX(10f) s8i a7, a5, 1
addi a5, a5, 2
addi a4, a4, -2
j .Ldstaligned # dst is now aligned, return to main algorithm
/*
* Byte by byte copy
*/
.align 4
.byte 0 # 1 mod 4 alignment for LOOPNEZ
# (0 mod 4 alignment for LBEG)
.Lbytecopy:
#if XCHAL_HAVE_LOOPS
loopnez a4, .Lbytecopydone
#else /* !XCHAL_HAVE_LOOPS */
beqz a4, .Lbytecopydone
add a7, a3, a4 # a7 = end address for source
#endif /* !XCHAL_HAVE_LOOPS */
.Lnextbyte:
Annotation
- Immediate include surface: `linux/linkage.h`, `asm/asmmacro.h`, `asm/core.h`.
- Detected declarations: `export __xtensa_copy_user`.
- Atlas domain: Architecture Layer / arch/xtensa.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.