arch/xtensa/mm/misc.S

File Facts

System

Linux kernel

Corpus path

arch/xtensa/mm/misc.S

Extension

.S

Size

7625 bytes

Lines

464

Domain

Architecture Layer

Bucket

arch/xtensa

Inferred role

Architecture Layer: exported/initcall integration point

Status

integration implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.

Dependency Surface

• linux/linkage.h
• linux/pgtable.h
• asm/page.h
• asm/asmmacro.h
• asm/cacheasm.h
• asm/tlbflush.h

Detected Declarations

• export clear_page
• export copy_page
• export __invalidate_icache_range
• export __flush_dcache_range
• export __invalidate_dcache_range

Annotated Snippet

#include <linux/linkage.h>
#include <linux/pgtable.h>
#include <asm/page.h>
#include <asm/asmmacro.h>
#include <asm/cacheasm.h>
#include <asm/tlbflush.h>


/*
 * clear_page and clear_user_page are the same for non-cache-aliased configs.
 *
 * clear_page (unsigned long page)
 *                    a2
 */

ENTRY(clear_page)

	abi_entry_default

	movi	a3, 0
	__loopi	a2, a7, PAGE_SIZE, 32
	s32i	a3, a2, 0
	s32i	a3, a2, 4
	s32i	a3, a2, 8
	s32i	a3, a2, 12
	s32i	a3, a2, 16
	s32i	a3, a2, 20
	s32i	a3, a2, 24
	s32i	a3, a2, 28
	__endla	a2, a7, 32

	abi_ret_default

ENDPROC(clear_page)
EXPORT_SYMBOL(clear_page)

/*
 * copy_page and copy_user_page are the same for non-cache-aliased configs.
 *
 * copy_page (void *to, void *from)
 *               a2          a3
 */

ENTRY(copy_page)

	abi_entry_default

	__loopi a2, a4, PAGE_SIZE, 32

	l32i    a8, a3, 0
	l32i    a9, a3, 4
	s32i    a8, a2, 0
	s32i    a9, a2, 4

	l32i    a8, a3, 8
	l32i    a9, a3, 12
	s32i    a8, a2, 8
	s32i    a9, a2, 12

	l32i    a8, a3, 16
	l32i    a9, a3, 20
	s32i    a8, a2, 16
	s32i    a9, a2, 20

	l32i    a8, a3, 24
	l32i    a9, a3, 28
	s32i    a8, a2, 24
	s32i    a9, a2, 28

	addi    a2, a2, 32

Annotation

• Immediate include surface: `linux/linkage.h`, `linux/pgtable.h`, `asm/page.h`, `asm/asmmacro.h`, `asm/cacheasm.h`, `asm/tlbflush.h`.
• Detected declarations: `export clear_page`, `export copy_page`, `export __invalidate_icache_range`, `export __flush_dcache_range`, `export __invalidate_dcache_range`.
• Atlas domain: Architecture Layer / arch/xtensa.
• Implementation status: integration implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.