Documentation/arch/parisc/registers.rst

Source file repositories/reference/linux-study-clean/Documentation/arch/parisc/registers.rst

File Facts

System: Linux kernel
Corpus path: Documentation/arch/parisc/registers.rst
Extension: .rst
Size: 5670 bytes
Lines: 155
Domain: Support Tooling And Documentation
Bucket: Documentation
Inferred role: Support Tooling And Documentation: documentation
Status: atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

================================
Register Usage for Linux/PA-RISC
================================

[ an asterisk is used for planned usage which is currently unimplemented ]

General Registers as specified by ABI
=====================================

Control Registers
-----------------

===============================	===============================================
CR 0 (Recovery Counter)		used for ptrace
CR 1-CR 7(undefined)		unused
CR 8 (Protection ID)		per-process value*
CR 9, 12, 13 (PIDS)		unused
CR10 (CCR)			lazy FPU saving*
CR11				as specified by ABI (SAR)
CR14 (interruption vector)	initialized to fault_vector
CR15 (EIEM)			initialized to all ones*
CR16 (Interval Timer)		read for cycle count/write starts Interval Tmr
CR17-CR22			interruption parameters
CR19				Interrupt Instruction Register
CR20				Interrupt Space Register
CR21				Interrupt Offset Register
CR22				Interrupt PSW
CR23 (EIRR)			read for pending interrupts/write clears bits
CR24 (TR 0)			Kernel Space Page Directory Pointer
CR25 (TR 1)			User   Space Page Directory Pointer
CR26 (TR 2)			not used
CR27 (TR 3)			Thread descriptor pointer
CR28 (TR 4)			not used
CR29 (TR 5)			not used
CR30 (TR 6)			current / 0
CR31 (TR 7)			Temporary register, used in various places
===============================	===============================================

Space Registers (kernel mode)
-----------------------------

===============================	===============================================
SR0				temporary space register
SR4-SR7 			set to 0
SR1				temporary space register
SR2				kernel should not clobber this
SR3				used for userspace accesses (current process)
===============================	===============================================

Space Registers (user mode)
---------------------------

===============================	===============================================
SR0				temporary space register
SR1                             temporary space register
SR2                             holds space of linux gateway page
SR3                             holds user address space value while in kernel
SR4-SR7                         Defines short address space for user/kernel
===============================	===============================================


Processor Status Word
---------------------

===============================	===============================================
W (64-bit addresses)		0
E (Little-endian)		0
S (Secure Interval Timer)	0
T (Taken Branch Trap)		0
H (Higher-privilege trap)	0

Annotation

Atlas domain: Support Tooling And Documentation / Documentation.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.