Documentation/arch/powerpc/qe_firmware.rst

Source file repositories/reference/linux-study-clean/Documentation/arch/powerpc/qe_firmware.rst

File Facts

System: Linux kernel
Corpus path: Documentation/arch/powerpc/qe_firmware.rst
Extension: .rst
Size: 13161 bytes
Lines: 297
Domain: Support Tooling And Documentation
Bucket: Documentation
Inferred role: Support Tooling And Documentation: documentation
Status: atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

function multiprocessing

Annotated Snippet

=========================================
Freescale QUICC Engine Firmware Uploading
=========================================

(c) 2007 Timur Tabi <timur at freescale.com>,
    Freescale Semiconductor

.. Table of Contents

   I - Software License for Firmware

   II - Microcode Availability

   III - Description and Terminology

   IV - Microcode Programming Details

   V - Firmware Structure Layout

   VI - Sample Code for Creating Firmware Files

Revision Information
====================

November 30, 2007: Rev 1.0 - Initial version

I - Software License for Firmware
=================================

Each firmware file comes with its own software license.  For information on
the particular license, please see the license text that is distributed with
the firmware.

II - Microcode Availability
===========================

Firmware files are distributed through various channels.  Some are available on
http://opensource.freescale.com.  For other firmware files, please contact
your Freescale representative or your operating system vendor.

III - Description and Terminology
=================================

In this document, the term 'microcode' refers to the sequence of 32-bit
integers that compose the actual QE microcode.

The term 'firmware' refers to a binary blob that contains the microcode as
well as other data that

	1) describes the microcode's purpose
	2) describes how and where to upload the microcode
	3) specifies the values of various registers
	4) includes additional data for use by specific device drivers

Firmware files are binary files that contain only a firmware.

IV - Microcode Programming Details
===================================

The QE architecture allows for only one microcode present in I-RAM for each
RISC processor.  To replace any current microcode, a full QE reset (which
disables the microcode) must be performed first.

QE microcode is uploaded using the following procedure:

1) The microcode is placed into I-RAM at a specific location, using the
   IRAM.IADD and IRAM.IDATA registers.

2) The CERCR.CIR bit is set to 0 or 1, depending on whether the firmware
   needs split I-RAM.  Split I-RAM is only meaningful for SOCs that have

Annotation

Detected declarations: `function multiprocessing`.
Atlas domain: Support Tooling And Documentation / Documentation.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.