Documentation/devicetree/bindings/arm/marvell/armada-370-xp-pmsu.txt

File Facts

System

Linux kernel

Corpus path

Documentation/devicetree/bindings/arm/marvell/armada-370-xp-pmsu.txt

Extension

.txt

Size

567 bytes

Lines

22

Domain

Support Tooling And Documentation

Bucket

Documentation

Inferred role

Support Tooling And Documentation: documentation

Status

atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

• Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

Power Management Service Unit(PMSU)
-----------------------------------
Available on Marvell SOCs: Armada 370, Armada 38x and Armada XP

Required properties:

- compatible: should be one of:
  - "marvell,armada-370-pmsu" for Armada 370 or Armada XP
  - "marvell,armada-380-pmsu" for Armada 38x
  - "marvell,armada-370-xp-pmsu" was used for Armada 370/XP but is now
    deprecated and will be removed

- reg: Should contain PMSU registers location and length.

Example:

armada-370-xp-pmsu@22000 {
	compatible = "marvell,armada-370-pmsu";
	reg = <0x22000 0x1000>;
};

Annotation

• Atlas domain: Support Tooling And Documentation / Documentation.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.