Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml- Extension
.yaml- Size
- 2289 bytes
- Lines
- 94
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/qcom,coresight-ctcu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: CoreSight TMC Control Unit
maintainers:
- Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>
- Mao Jinlong <jinlong.mao@oss.qualcomm.com>
- Jie Gan <jie.gan@oss.qualcomm.com>
description: |
The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB),
Embedded Trace FIFO(ETF) and Embedded Trace Router(ETR) configurations.
The configuration mode (ETB, ETF, ETR) is discovered at boot time when
the device is probed.
The Coresight TMC Control unit controls various Coresight behaviors.
It works as a helper device when connected to TMC ETR device.
It is responsible for controlling the data filter function based on
the source device's Trace ID for TMC ETR device. The trace data with
that Trace id can get into ETR's buffer while other trace data gets
ignored.
properties:
compatible:
oneOf:
- items:
- enum:
- qcom,qcs8300-ctcu
- const: qcom,sa8775p-ctcu
- enum:
- qcom,sa8775p-ctcu
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: apb
label:
description:
Description of a coresight device.
in-ports:
$ref: /schemas/graph.yaml#/properties/ports
patternProperties:
'^port(@[0-1])?$':
description: Input connections from CoreSight Trace bus
$ref: /schemas/graph.yaml#/properties/port
required:
- compatible
- reg
- in-ports
additionalProperties: false
examples:
- |
ctcu@1001000 {
compatible = "qcom,sa8775p-ctcu";
reg = <0x1001000 0x1000>;
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.