Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml- Extension
.yaml- Size
- 2544 bytes
- Lines
- 114
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Trace Network On Chip - TNOC
maintainers:
- Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>
description: >
The Trace Network On Chip (TNOC) is an integration hierarchy hardware
component that integrates the functionalities of TPDA and funnels.
It sits in the different subsystem of SOC and aggregates the trace and
transports it to Aggregation TNOC or to coresight trace sink eventually.
TNOC embeds bridges for all the interfaces APB, ATB, TPDA and NTS (Narrow
Time Stamp).
TNOC can take inputs from different trace sources i.e. ATB, TPDM.
Note this binding is specifically intended for Aggregator TNOC instances.
# Need a custom select here or 'arm,primecell' will match on lots of nodes
select:
properties:
compatible:
contains:
enum:
- qcom,coresight-tnoc
required:
- compatible
properties:
$nodename:
pattern: "^tn(@[0-9a-f]+)$"
compatible:
items:
- const: qcom,coresight-tnoc
- const: arm,primecell
reg:
maxItems: 1
clock-names:
items:
- const: apb_pclk
clocks:
items:
- description: APB register access clock
in-ports:
$ref: /schemas/graph.yaml#/properties/ports
patternProperties:
'^port(@[0-9a-f]{1,2})?$':
description: Input connections from CoreSight Trace Bus
$ref: /schemas/graph.yaml#/properties/port
out-ports:
$ref: /schemas/graph.yaml#/properties/ports
additionalProperties: false
properties:
port:
description:
Output connection to CoreSight Trace Bus
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.