Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml- Extension
.yaml- Size
- 514 bytes
- Lines
- 26
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/socionext/milbeaut.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Milbeaut platforms
maintainers:
- Taichi Sugaya <sugaya.taichi@socionext.com>
- Takao Orito <orito.takao@socionext.com>
properties:
$nodename:
const: '/'
compatible:
oneOf:
- items:
- enum:
- socionext,milbeaut-m10v-evb
- const: socionext,sc2000a
additionalProperties: true
...
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.